參數(shù)資料
型號： L64007
廠商： LSI CORP
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝： PLASTIC, QFP-160
文件頁數(shù)： 110/166頁
文件大?。?/td> 1015K
代理商： L64007
Arch
40 Wed May 28 17:36:23 1997
Draft 1/21/97
2-40
Architecture
PRE.4 for Rev. D
Copyright 1997 by LSI Logic Corporation. All rights reserved.
2.4.4
Cyclic Buffer
Manager
The CBM is tightly coupled with the DRAM Controller. The CBM supports
data transfer from the PID Post-processor or A/V extended channel
buffer to the DRAM. The CBM contains the Address Mapping Register
File (AMRF), which is described in detail in Section 4.10. This array of
control registers lets the user specify the address space of each of the
32 programmable PIDs and of the adaptation eld. The PID Index
decoded by the PID Pre-processor is transmitted to this unit. It is used
to select the set of address registers used to specify the cyclic buffer
boundaries and the current address to which the payload of this PID is
transferred. The rst 30 cyclic buffers service the PSI, SI, or private data
(PID Index 0 - 29). Two cyclic buffers service the audio and video PES
data in extended channel mode (PID Index 30 - PID Index 31). One
cyclic buffer stores the adaptation eld of selected PIDs (PID Index 32).
When an adaptation eld is posted, a PID Index byte is appended to the
front of each packet.
Each cyclic buffer dened for a particular PID Index contains the follow-
ing registers:
Start Address Pointer (16-bit)
End Address Pointer (16-bit)
Write Address Pointer (16-bit)
Read Address Pointer/Last Section Address (16-bit, Read for audio
and video PIDs, Last Section Address for PSI)
PSI PIDs
Address Extension Register (16-bit, 4-bit nibble for each pointer)
Figure 2.37 shows the AMRF structure.
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