參數(shù)資料
型號(hào): ISP1161A1
廠商: NXP Semiconductors N.V.
英文描述: Universal Serial Bus single-chip host and device controller
中文描述: 通用串行總線的單芯片主機(jī)和設(shè)備控制器
文件頁數(shù): 56/127頁
文件大?。?/td> 2762K
代理商: ISP1161A1
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
56 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
Code (Hex): 01 —
read
Code (Hex): 81 —
write
13.1.3
HcCommandStatus Register
The HcCommandStatus register is used by the HC to receive commands issued by
the HCD, and it also reflects the HC’s current status. To the HCD, it appears to be a
‘write to set’ register. The HC must ensure that bits written as logic 1 become set in
the register while bits written as logic 0 remain unchanged in the register. The HCD
may issue multiple distinct commands to the HC without concern for corrupting
previously issued commands. The HCD has normal read access to all bits.
Table 19: HcControl Register: bit description
Bit
Symbol
31 to 11
-
10
RWE
Description
reserved
RemoteWakeupEnable:
This bit is used by the HCD to enable or
disable the remote wakeup feature upon the detection of upstream
resume signaling. When this bit is set and the ResumeDetected bit
in HcInterruptStatus is set, a remote wakeup is signaled to the host
system. Setting this bit has no impact on the generation of
hardware interrupt.
RemoteWakeupConnected:
This bit indicates whether the HC
supports remote wakeup signaling. If remote wakeup is supported
and used by the system, it is the responsibility of system firmware
to set this bit during POST. The HC clears the bit upon a hardware
reset but does not alter it upon a software reset. Remote wakeup
signaling of the host system is host-bus-specific and is not
described in this specification.
reserved
HostControllerFunctionalState
for USB:
00B —
USBRESET
01B —
USBRESUME
10B —
USBOPERATIONAL
11B —
USBSUSPEND
A transition to USBOPERATIONAL from another state causes
start-of-frame (SOF) generation to begin 1 ms later. The HCD may
determine whether the HC has begun sending SOFs by reading
the StartofFrame field of HcInterruptStatus.
This field may be changed by the HC only when in the
USBSUSPEND state. The HC may move from the USBSUSPEND
state to the USBRESUME state after detecting the resume
signaling from a downstream port.
The HC enters USBSUSPEND after a software reset; it enters
USBRESET after a hardware reset. The latter also resets the Root
Hub and asserts subsequent reset signaling to downstream ports.
reserved
9
RWC
8
7 to 6
-
HCFS
5 to 0
-
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ISP1161A1BD Universal Serial Bus single-chip host and device controller
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