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參數(shù)資料
| 型號(hào)： | ID82C284 |
| 廠商： | Intersil Corporation |
| 英文描述： | Clock Generator and Ready Interface for 80C286 Processors |
| 中文描述： | 時(shí)鐘發(fā)生器和Ready接口80C286處理器 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大小： | 72K |
| 代理商： | ID82C284 |
9
AC Specifications
AC Test Condition
t19
CLK Rise Time
-
8
-
8
ns
1.0V to 3.6V, C
L
= 100pF
t20
CLK Fall Time
-
8
-
8
ns
3.6V to 1.0V, C
L
= 100pF
t27
X1 HIGH to CLK
-
35
-
30
ns
(Note 4)
NOTES:
1. The parameters listed in this table are controlled via design or, process parameters and are not directly tested. These parameters are
characterized upon initial design and after major process and/or design changes.
2. Measured from 3.2V on the EFI waveform to 1.0V on the CLK.
3. Measured from 0.8V on the EFI waveform to 3.6V on the CLK.
4. Measured from 3.6V on the X1 input to 3.6V on the CLK.
UNTESTED SPECIFICATIONS (Continued)
SYMBOL
PARAMETER
10MHz
12.5MHz
UNITS
CONDlTIONS
(NOTE 1)
MIN
MAX
MIN
MAX
3.2V
3.8V
0.4V
0.8V
3.6V
1.0V
3.6V
1.0V
0.4V
3.8V
0.4V
V
CC
- 0.4V
0.4V
2.4
0.4V
V
CC
- 0.4V
t
SETUP
3.2V
0.8V
3.2V
0.8V
0.8V
2.0V
0.8V
2.0V
0.8V
t
DELAY
(MIN)
t
DELAY
(MAX)
EFI INPUT
CLK
F/C
RES
INPUT
OTHER
DEVICE
INPUT
DEVICE
OUTPUT
t
HOLD
0.8V
2.0V
0.8V
INPUT
OUTPUT
FIGURE 7. A.C. DRIVE, SETUP, HOLD AND DELAY TIME
MEASUREMENT POINTS
t
DELAY
(MAX)
VCC - 0.8V
TEST CONDITION
R
L
750
C
L
75pF
1
2
620
∞
150pF
3
75pF
V
CC
R
L
C
L
DEVICE
OUTPUT
FIGURE 8.
82C284
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| ID82C284-10 | 制造商:Harris Corporation 功能描述: 制造商:Intersil Corporation 功能描述: |
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| ID82C37A | 制造商:HARRIS 制造商全稱:HARRIS 功能描述:CMOS High Performance Programmable DMA Controller |
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