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參數(shù)資料
| 型號(hào)： | HY5V52EMP-H |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 8M X 32 SYNCHRONOUS DRAM, 5.4 ns, PBGA90 |
| 封裝： | 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, FBGA-90 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 172K |
| 代理商： | HY5V52EMP-H |
Rev. 1.0 / Nov. 2005
2
1
Synchronous DRAM Memory 256Mbit (8Mx16bit *2stack)
HY5V52E(L)M(P) Series
DESCRIPTION
The Hynix HY5V52E(L)M(P) series is a 268,435,456bit CMOS Synchronous DRAM, ideally suited for the memory appli-
cations which require wide data I/O and high bandwidth. HY5V52E(L)M(P) is organized as 4banks of 2,097,152 x 32.
HY5V52E(L)M(P) is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and out-
puts are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very
high bandwidth. All input and output voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write
cycles initiated by a single control command (Burst length of 1,2,4,8 or full page), and the burst count sequence(se-
quential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate command or
can be interrupted and replaced by a new burst read or write command on any cycle. (This pipelined design is not re-
stricted by a '2N' rule)
FEATURES
Voltage on VDD and VDDQ
- HY5V52E(L)M(P) Series: 3.3V
All device pins are compatible with LVTTL interface
90Ball FBGA with 0.8mm of pin pitch
All inputs and outputs referenced to positive edge of
system clock
Data mask function by DQM0,1, 2 and 3
Internal four banks operation
Auto refresh and self refresh
4096 Refresh cycles / 64ms
Programmable Burst Length and Burst Type
- 1, 2, 4, 8 or full page for Sequential Burst
- 1, 2, 4 or 8 for Interleave Burst
Programmable CAS Latency ; 2, 3 Clocks
Burst Read Single Write operation
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相關(guān)代理商/技術(shù)參數(shù) |
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| HY5V52F | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
| HY5V52F-H | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
| HY5V52F-P | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
| HY5V52FP-H | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
| HY5V52FP-P | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
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