參數(shù)資料
型號(hào): HY27US081G1MTPMP
廠商: HYNIX SEMICONDUCTOR INC
元件分類: PROM
英文描述: 128M X 8 FLASH 2.7V PROM, 45 ns, PDSO48
封裝: 12 X 20 MM, 1.20 MM HEIGHT, LEAD FREE, TSOP1-48
文件頁(yè)數(shù): 23/39頁(yè)
文件大?。?/td> 312K
代理商: HY27US081G1MTPMP
Rev 0.2 / May. 2007
3
Preliminary
HY27US(08/16)1G1M Series
1Gbit (128Mx8bit / 64Mx16bit) NAND Flash
FEATURES SUMMARY
HIGH DENSITY NAND FLASH MEMORIES
- Cost effective solutions for mass storage applications
NAND INTERFACE
- x8 or x16 bus width.
- Multiplexed Address/ Data
- Pinout compatibility for all densities
SUPPLY VOLTAGE
- VCC = 2.7 to 3.6V : HY27USxx1G1M
Memory Cell Array
= (512+16) Bytes x 32 Pages x 8,192 Blocks
= (256+8) Words x 32 Pages x 8,192 Blocks
PAGE SIZE
- x8 device : (512 + 16 spare) Bytes
: HY27US081G1M
- x16 device : (256+ 8 spare) Words
: HY27US161G1M
BLOCK SIZE
- x8 device: (16K + 512 spare) Bytes
- x16 device: (8K + 256 spare) Words
PAGE READ / PROGRAM
- Random access: 15us (max.)
- Sequential access: 50ns (min.)
- Page program time: 200us (typ.)
COPY BACK PROGRAM MODE
- Fast page copy without external buffering
FAST BLOCK ERASE
- Block erase time: 2ms (Typ.)
STATUS REGISTER
ELECTRONIC SIGNATURE
- 1st cycle : Manufacturer Code
- 2nd cycle : Device Code
- 3rd cycle: Internal chip number, Cell Type, Number of
Simultaneously Programmed Pages.
- 4th cycle: Page size, Block size, Organization, Spare
size
CHIP ENABLE DON’T CARE OPTION
- Simple interface with microcontroller
AUTOMATIC PAGE 0 READ AT POWER-UP OPTION
- Boot from NAND support
- Automatic Memory Download
SERIAL NUMBER OPTION
HARDWARE DATA PROTECTION
- Program/Erase locked during Power transitions
DATA INTEGRITY
- 100,000 Program/Erase cycles (with 4bit/528byte ECC)
- 10 years Data Retention
PACKAGE
- HY27US(08/16)1G1M-T(P)
: 48-Pin TSOP1 (12 x 20 x 1.2 mm)
- HY27US(08/16)1G1M-T (Lead)
- HY27US(08/16)1G1M-TP (Lead Free)
- HY27US081G1M-S(P)
: 48-Pin USOP1 (12 x 17 x 0.65 mm)
- HY27US081G1M-S (Lead)
- HY27US081G1M-SP (Lead Free)
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