參數(shù)資料
型號： HM5212165F
廠商： Hitachi,Ltd.
英文描述： 128M LVTTL interface SDRAM(128M LVTTL 接口同步DRAM)
中文描述： 128M的LVTTL接口的SDRAM（128M的LVTTL接口同步的DRAM）
文件頁數(shù)： 8/63頁
文件大小： 858K
代理商： HM5212165F
HM5212165F/HM5212805F-75/A60/B60
8
Command Operation
Command Truth Table
The SDRAM recognizes the following commands specified by the
CS
,
RAS
,
CAS
,
WE
and address pins.
CKE
Command
Symbol
n - 1
n
CS
RAS CAS WE
A12/A13
A10
A0
to A11
Ignore command
DESL
H
×
×
×
×
×
×
×
×
×
×
H
×
×
×
×
×
×
×
×
×
×
×
×
No operation
NOP
H
L
H
H
H
Burst stop in full page
BST
H
L
H
H
L
Column address and read command READ
H
L
H
L
H
V
L
V
Read with auto-precharge
READ A
H
L
H
L
H
V
H
V
Column address and write command WRIT
H
L
H
L
L
V
L
V
Write with auto-precharge
WRIT A
H
L
H
L
L
V
H
V
Row address strobe and bank active ACTV
H
L
L
H
H
V
V
V
Precharge select bank
PRE
H
L
L
H
L
V
L
×
×
×
Precharge all bank
PALL
H
L
L
H
L
×
×
H
Refresh
REF/SELF H
V
L
L
L
H
×
Mode register set
Note:
H: V
IH
. L: V
IL
.
×
: V
IH
or V
IL
. V: Valid address input
MRS
H
×
L
L
L
L
V
V
V
Ignore command [DESL]:
When this command is set (
CS
is High), the SDRAM ignore command input at
the clock. However, the internal status is held.
No operation [NOP]:
This command is not an execution command. However, the internal operations
continue.
Burst stop in full-page [BST]:
This command stops a full-page burst operation (burst length = full-page
(512; HM5212165F, 1024; HM5212805F)), and is illegal otherwise. When data input/output is vompleted for
a full page of data, it automatically returns to the start address and input/output is preformed repeatedly.
Column address strobe and read command [READ]:
This command starts a read operation. In addition,
the start address of burst read is determined by the column address (AY0 to AY8; HM5212165F, AY0 to
AY9; HM5212805F) and the bank select address (BS). After the read operation, the output buffer becomes
High-Z.
Read with auto-precharge [READ A]:
This command automatically performs a precharge operation after a
burst read with a burst length of 1, 2, 4 or 8. When the burst length is full-page, this command is illegal.
相關(guān)PDF資料
PDF描述
HM5225165BTT-75 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5225805BLTT-A6 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5225405B-B6 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5225405BLTT-75 POT 20K OHM 9MM HORZ NO BUSHING
HM5225405BLTT-A6 POT 5K OHM 9MM HORZ NO BUSHING
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HM5212165FLTD-75 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM
HM5212165FLTD-A60 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM
HM5212165FLTD-B60 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM
HM5212165FTD-75 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM
HM5212165FTD-A60 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword × 16-bit × 4-bank/4-Mword × 8-bit × 4-bank PC/133, PC/100 SDRAM
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*