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參數(shù)資料
| 型號(hào)： | HDMP-0450 |
| 英文描述： | Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops |
| 中文描述： | 四端口旁路電路的光纖通道仲裁環(huán)路 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 269K |
| 代理商： | HDMP-0450 |
4
I/O Type Definitions
I/O Type
I-LVTTL
O-LVTTL
HS_OUT
HS_IN
C
S
Definition
LVTTL Input
LVTTL Output
High Speed Output. LVPECL Compatible
High Speed Input
External Circuit Note
Power Supply or Ground
Pin Definitions
Pin Name
TO_NODE[0]+
TO_NODE[0]–
TO_NODE[1]+
TO_NODE[1]–
TO_NODE[2]+
TO_NODE[2]–
TO_NODE[3]+
TO_NODE[3]–
TO_NODE[4]+
TO_NODE[4]–
FM_NODE[0]+
FM_NODE[0]–
FM_NODE[1]+
FM_NODE[1]–
FM_NODE[2]+
FM_NODE[2]–
FM_NODE[3]+
FM_NODE[3]–
FM_NODE[4]+
FM_NODE[4]–
BYPASS[0]–
BYPASS[1]–
BYPASS[2]–
BYPASS[3]–
BYPASS[4]–
SD
Pin
24
25
07
06
44
43
38
37
31
30
10
09
04
03
41
40
35
34
28
27
14
15
16
17
18
20
Pin Type
HS_OUT
Pin Description
Serial Data Outputs:
High-speed outputs to a hard disk drive or to a cable.
HS_IN
Serial Data Inputs:
High-speed inputs from a hard disk drive or from a cable.
I-LVTTL
Bypass Inputs:
For “disk bypassed” mode, connect BYPASS[n]– to GND through
a 1 k
resistor. For “disk in loop” mode, float HIGH.
O-LVTTL
Signal Detect:
Indicates acceptable signal amplitude on the FM_NODE[0]
±
inputs.
If (FM_NODE[0]+ – FM_NODE[0]–) >= 400 mV peak-to-peak, SD = 1
If 400 mV > (FM_NODE[0]+ – FM_NODE[0]–) > 100 mV, SD = undefined
If 100 mV >= (FM_NODE[0]+ – FM_NODE[0]–), SD = 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HDMP-0452 | Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrated Loops |
| HDMP-0552 | AGILENT HDMP-0552 QUAD PORT BYPASS CIRCUIT WITH CDR AND DATA VALID DETECTION |
| HDMP-1637A | Gigabit Ethernet Serialize/Deserialize (SerDes) with Differential PECL Clock Inputs(帶差分PECL時(shí)鐘輸入的千兆位以太網(wǎng)串行器/解串行器) |
| HDMP-1638 | Gigabit Ethernet Transceiver Chip with Dual Serial I/O and Differential PECL Clock Inputs(帶雙路串行I/O和差分PECL時(shí)鐘輸入的千兆位以太網(wǎng)收發(fā)器) |
| HDMP-2689 | Quad 2.125/1.0625 GBd Fibre Channel General Purpose SerDes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HDMP-0451 | 制造商:Rochester Electronics LLC 功能描述: 制造商:PMC-Sierra 功能描述: |
| HDMP-0451G | 制造商:Rochester Electronics LLC 功能描述: 制造商:PMC-Sierra 功能描述: |
| HDMP-0452 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrated Loops |
| HDMP-0480 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Octal Cell Port Bypass Circuit without Clock and Data Recovery |
| HDMP-0482 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Octal Cell Port Bypass Circuit with CDR and Data Valid Detection |
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