參數(shù)資料
型號: ELANSC410
英文描述: Single Synchronous Buck Pulse-Width Modulation (PWM) Controller; Temperature Range: 0&degC to 70°C; Package: 16-QFN
中文描述: ElanSC410 - ElanSC410框圖
文件頁數(shù): 38/119頁
文件大?。?/td> 1167K
代理商: ELANSC410
lanSC310 Microcontroller Data Sheet
25
PREL IMINARY
Notes:
1. These outputs function as open-drain outputs in Normal Parallel Port mode, and function as CMOS drivers when the EPP-
MODE configuration bit is set.
2. The parallel port interface BUSY input must have an external pullup if the parallel port is to be used in EPP mode. If this pullup
is not present, accesses to the parallel port in EPP mode will lock up the system.
All inputs that have VCC clamp = 5 V are 5-V safe inputs regardless of their VCCIO.
Notes:
1. These pins are terminated externally per bus option selection.
All inputs that have VCC clamp = 5 V are 5-V safe inputs regardless of their VCCIO.
Table 5.
Parallel Port Interface
Signal Name
Pin No.
I/O
Type
Term
Drive
Type
Clock
Off
Reset State
(volts)
VCCIO
VCC
Clamp
Spec.
Load
(pF)
Local
Bus
Max
ISA
AFDT [X14OUT]1
80
O
—D
Last
state
5.0
VCC5
100
INIT1
89
O
D
Last
state
0.0
VCC5
100
STRB1
83
O
D
Last
state
5.0
VCC5
100
SLCTIN1
84
O
D
Last
state
5.0
VCC5
100
ACK
88
I
5.0
VCC5
BUSY2
85
I
5.0
VCC5
ERROR
86
I
5.0
VCC5
PE
82
I
5.0
VCC5
SLCT
87
I
5.0
VCC5
PPDWE [PPDCS]
90
O
B
1(1)
5.0
VCC5
30
PPOEN
91
O
B
1(1)
0.0
VCC5
30
Table 6.
Serial Port Interface
Signal Name
Pin No.
I/O
Type
Term
Drive
Type
Clock
Off
Reset State
(volts)
VCCIO
VCC
Clamp
Spec.
Load
(pF)
Local
Bus
Max
ISA
DTR/CFG11
92
O
A
Last state
5.0
0
VCC5
50
RTS/CFG01
93
O
A
Last state
0.0
5.0
VCC5
50
SOUT
94
O
A
Last state
0.0
5.0
VCC5
50
CTS
96
I
PU
5.0
VCC5
DCD
98
I
PU
5.0
VCC5
DSR
97
I
PU
5.0
VCC5
RIN
100
I
PU
5.0
VCC5
SIN
99
I
PU
5.0
VCC5
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