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參數(shù)資料
| 型號(hào)： | ELANSC410 |
| 英文描述： | Single Synchronous Buck Pulse-Width Modulation (PWM) Controller; Temperature Range: 0°C to 70°C; Package: 16-QFN |
| 中文描述： | ElanSC410 - ElanSC410框圖 |
| 文件頁(yè)數(shù)： | 105/119頁(yè) |
| 文件大?。?/td> | 1167K |
| 代理商： | ELANSC410 |
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86
lanSC310 Microcontroller Data Sheet
PREL IMINARY
LOOP FILTERS
Each of the Phase-Locked Loops (PLLs) in the
lanSC310 microcontroller requires an external Loop
Filter. Figure 30 describes each of the Loop Filters and
the recommended component values. The recom-
mended values for the components are shown in
The system designer shall include the pads on the
printed circuit board to accommodate the future instal-
lation/change of C2 and R1. This is recommended be-
cause the PLL performance can be affected by the
physical circuit board design. In addition, future revi-
sions of the lanSC310 microcontroller with a modified
PLL design may require the addition of these compo-
nents to the system board.
The component value(s) of the Loop Filter directly af-
fect the acquisition (start up) time of the PLL circuit.
With the values recommended, the approximate acqui-
sition time is 200 ms. Therefore, the system designer
should program the Clock Control Register at Index 8F
appropriately. Bits 0, 1, and 2 set the PLL restart delay
time. When the PLLs are shut off for any reason (i.e.,
power management), the PLL will be allowed an
amount of time equal to that programmed in this regis-
ter to start up before the PLL outputs are enabled for
the internal device logic. A PLL restart delay time of
256 ms should be set in the Clock Control Register.
The pulse width of the RSTDRV signal is adjustable
based on the PLL start-up timing. For more informa-
tion, see the timing specifications in Table 45 on page
Table 9 on page 28 shows the pin characteristics for the
Loop Filters, including the reset voltage level when
RESIN is active.
For more information about Loop Filters, see the
Trou-
bleshooting Guide for Micro Power Off Mode on
lanTMSC300 and lanSC310 Microcontrollers and
Evaluation Boards Application Note, order #21810.
Figure 30.
Loop-Filter Component
Notes:
When the PLL is on, VLFx should be approximately between
1 V and 2 V.
Table 44.
Loop-Filter Component Values
LFx
R1
C1
C2
10
0.47
F
Not Installed
20
0.47
F
Not Installed
30
0.47
F
Not Installed
40
0.47
F
Not Installed
LFx
R1
C1
C2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ELANSC410-100AC | 制造商:Advanced Micro Devices 功能描述:MCU 16-Bit/32-Bit Elan CISC ROMLess 3.3V 292-Pin BGA |
| ELANSC410-100ACAD | 制造商:Advanced Micro Devices 功能描述: |
| ELANSC410-100AI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers |
| ELANSC410-33AC | 制造商:Advanced Micro Devices 功能描述:MCU 16-Bit/32-Bit Elan CISC 3.3V 292-Pin BGA |
| ELANSC410-33AI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers |
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