參數(shù)資料
型號(hào): EFM32G222F128
廠商: Energy Micro
文件頁(yè)數(shù): 50/136頁(yè)
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB FLASH 48LQFP
特色產(chǎn)品: EFM32 Gecko
標(biāo)準(zhǔn)包裝: 1
系列: Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 37
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x12b,D/A 1x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱(chēng): 914-1027-6
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...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
20
www.energymicro.com
Bits[31:1] of the alias word have no effect on the bit-band bit. Writing 0x01 has the same effect as writing
0xFF
. Writing 0x00 has the same effect as writing 0x0E.
Reading a word in the alias region:
0x00000000 indicates that the targeted bit in the bit-band region is set to zero
0x00000001 indicates that the targeted bit in the bit-band region is set to 1
2.2.5.2 Directly accessing a bit-band region
Section 2.2.3 (p. 16) describes the behavior of direct byte, halfword, or word accesses to the bit-
band regions.
2.2.6 Memory endianness
The processor views memory as a linear collection of bytes numbered in ascending order from
zero. For example, bytes 0-3 hold the first stored word, and bytes 4-7 hold the second stored word.
Section 2.2.6.1 (p. 20) describes how words of data are stored in memory.
2.2.6.1 Little-endian format
The EFM32 uses a little-endian format, in which the processor stores the least significant byte of a word
at the lowest-numbered byte, and the most significant byte at the highest-numbered byte. For example:
Mem ory
Regist er
Address A
A+ 1
lsbyt e
m sbyt e
A+ 2
A+ 3
0
7
B0
B1
B3
B2
31
2423
1615
8 7
0
B0
B1
B2
B3
2.2.7 Synchronization primitives
The Cortex-M3 instruction set includes pairs of synchronization primitives. These provide a non-blocking
mechanism that a thread or process can use to obtain exclusive access to a memory location. Software
can use them to perform a guaranteed read-modify-write memory update sequence, or for a semaphore
mechanism.
A pair of synchronization primitives comprises:
A Load-Exclusive instruction
Used to read the value of a memory location, requesting exclusive
access to that location.
A Store-Exclusive instruction
Used to attempt to write to the same memory location, returning a
status bit to a register. If this bit is:
0
it indicates that the thread or process gained exclusive access to
the memory, and the write succeeds,
1
it indicates that the thread or process did not gain exclusive
access to the memory, and no write is performed,
The pairs of Load-Exclusive and Store-Exclusive instructions are:
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