參數(shù)資料
型號： EFM32G222F128
廠商： Energy Micro
文件頁數(shù)： 14/136頁
文件大?。?/td> 0K
描述： IC MCU 32BIT 128KB FLASH 48LQFP
特色產(chǎn)品： EFM32 Gecko
標(biāo)準(zhǔn)包裝： 1
系列： Gecko
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 32MHz
連通性： I²C，IrDA，智能卡，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，DMA，POR，PWM，WDT
輸入/輸出數(shù)： 37
程序存儲器容量： 128KB（128K x 8）
程序存儲器類型： 閃存
RAM 容量： 16K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x12b，D/A 1x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-TQFP
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： 914-1027-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
110
www.energymicro.com
Bits
Name
Function
When this bit is set to 1, the PC value stacked for the exception return points to the instruction
that was preempted by the exception.
[0]
-
Reserved.
Note
The HFSR bits are sticky. This means as one or more fault occurs, the associated bits are
set to 1. A bit that is set to 1 is cleared to 0 only by writing 1 to that bit, or by a reset.
4.3.13 Memory Management Fault Address Register
The MMFAR contains the address of the location that generated a memory management fault. See the
register summary in Table 4.12 (p. 94) for its attributes. The bit assignments are:
Table 4.30. MMFAR bit assignments
Bits
Name
Function
[31:0]
ADDRESS
When the MMARVALID bit of the MMFSR is set to 1, this field holds the address of the location
that generated the memory management fault
When an unaligned access faults, the address is the actual address that faulted. Because a single read
or write instruction can be split into multiple aligned accesses, the fault address can be any address in
the range of the requested access size.
Flags in the MMFSR indicate the cause of the fault, and whether the value in the MMFAR is valid. See
4.3.14 Bus Fault Address Register
The BFAR contains the address of the location that generated a bus fault. See the register summary in
Table 4.12 (p. 94) for its attributes. The bit assignments are:
Table 4.31. BFAR bit assignments
Bits
Name
Function
[31:0]
ADDRESS
When the BFARVALID bit of the BFSR is set to 1, this field holds the address of the location that
generated the bus fault
When an unaligned access faults the address in the BFAR is the one requested by the instruction, even
if it is not the address of the fault.
Flags in the BFSR indicate the cause of the fault, and whether the value in the BFAR is valid. See
4.3.15 System control block design hints and tips
Ensure software uses aligned accesses of the correct size to access the system control block registers:
except for the CFSR and SHPR1-SHPR3, it must use aligned word accesses
for the CFSR and SHPR1-SHPR3 it can use byte or aligned halfword or word accesses.
The processor does not support unaligned accesses to system control block registers.
In a fault handler. to determine the true faulting address:
1. Read and save the MMFAR or BFAR value.
2. Read the MMARVALID bit in the MMFSR, or the BFARVALID bit in the BFSR. The MMFAR or BFAR
address is valid only if this bit is 1.
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