參數(shù)資料
型號： EFM32G222F128
廠商： Energy Micro
文件頁數(shù)： 126/136頁
文件大?。?/td> 0K
描述： IC MCU 32BIT 128KB FLASH 48LQFP
特色產(chǎn)品： EFM32 Gecko
標(biāo)準(zhǔn)包裝： 1
系列： Gecko
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 32MHz
連通性： I²C，IrDA，智能卡，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，DMA，POR，PWM，WDT
輸入/輸出數(shù)： 37
程序存儲器容量： 128KB（128K x 8）
程序存儲器類型： 閃存
RAM 容量： 16K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x12b，D/A 1x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-TQFP
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： 914-1027-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
9
www.energymicro.com
N
31 30 29 28 27 26 25 24 23
16 15
10 9 8
0
Z C V Q ICI/IT T
Reserved
ICI/IT
ISR_NUMBER
Reserved
Access these registers individually or as a combination of any two or all three registers, using the register
name as an argument to the MSR or MRS instructions. For example:
read all of the registers using PSR with the MRS instruction
write to the APSR using APSR with the MSR instruction.
The PSR combinations and attributes are:
Table 2.3. PSR register combinations
Register
Type
Combination
PSR
RW
1, 2
APSR, EPSR, and IPSR
IEPSR
RO
EPSR and IPSR
IAPSR
RW
1
APSR and IPSR
EAPSR
RW
2
APSR and EPSR
1The processor ignores writes to the IPSR bits.
2Reads of the EPSR bits return zero, and the processor ignores writes to the these bits
See the instruction descriptions Section 3.10.6 (p. 83) and Section 3.10.7 (p. 83) for more
information about how to access the program status registers.
2.1.3.5.1 Application Program Status Register
The APSR contains the current state of the condition flags from previous instruction executions. See the
register summary in Table 2.2 (p. 7) for its attributes. The bit assignments are:
Table 2.4. APSR bit assignments
Bits
Name
Function
[31]
N
Negative or less than flag:
0 = operation result was positive, zero, greater than, or equal1 = operation result was negative or
less than.
[30]
Z
Zero flag:
0 = operation result was not zero1 = operation result was zero.
[29]
C
Carry or borrow flag:
0 = add operation did not result in a carry bit or subtract operation resulted in a borrow bit1 = add
operation resulted in a carry bit or subtract operation did not result in a borrow bit.
[28]
V
Overflow flag:
0 = operation did not result in an overflow1 = operation resulted in an overflow.
[27]
Q
Sticky saturation flag:
0 = indicates that saturation has not occurred since reset or since the bit was last cleared to zero1
= indicates when an SSAT or USAT instruction results in saturation.
This bit is cleared to zero by software using an MRS instruction.
[26:0]
-
Reserved.
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