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參數資料
| 型號： | DAC1627D1G25HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設及接口 |
| 英文描述： | Dual 16-bit DAC, up to 1.25 Gsps; 2x 4x and 8x interpolating |
| 封裝： | DAC1627D1G25HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813-3.html<1<Always Pb-free,; |
| 文件頁數： | 49/69頁 |
| 文件大?。?/td> | 1677K |
| 代理商： | DAC1627D1G25HN |
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DAC1627D1G25
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 29 April 2011
49 of 69
NXP Semiconductors
DAC1627D1G25
Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating
3
MDS_PRERUN_ENA
R/W
automatic MDS start-up
no mds_win/mds_ref generation in advance
mds_win/mds_ref run-in before mds_evaluation
width of MDS (in output clk-periods)
1 DAC clk-period
2 DAC clk-periods
(mds_pulsewidth
1)
×
4 DAC clk-periods
0
1
2 to 0
MDS_PULSEWIDTH[2:0]
R/W
000
001
010 to 111
Table 59.
Default values are shown highlighted.
Bit
Symbol
MDS_MISCCNTRL0 register (address 03h) bit description
…continued
Access
Value
Description
Table 60.
Default values are shown highlighted.
Bit
Symbol
7
MDS_MAN
MDS_MAN_ADJUSTDLY register (address 04h) bit description
Access
R/W
Value
Description
adjustment delays mode
auto-control adjustment delays
manual control adjustment delays
adjustment delay value
if MDS_MAN = 0 then initial value adjustment delay
if MDS_MAN = 1 then controls adjustment delay
0
1
6 to 0
MDS_MAN_ADJUSTDLY[6:0] R/W
-
-
Table 61.
Default values are shown highlighted.
Bit
Symbol
7 to 0
MDS_AUTO_CYCLES[7:0]
MDS_AUTO_CYCLES register (address 05h) bit description
Access
R/W
Value
-
Description
number of evaluation cycles applied for MDS. If set to
255 then IC continuously generates/monitors the MDS
pulse
Table 62.
Default values are shown highlighted.
Bit
Symbol
7
MDS_SR_CKEN
MDS_MISCCNTRL1 register (address 06h) bit description
Access
R/W
Value
-
0
1
Description
lock mode
free-running MDS_SR_CKEN
MDS_SR_CKEN forced low
lockout detector soft reset
MDS_SR_LOCKOUT in use
MDS_SR_LOCKOUT forced low
lock detector soft reset
MDS_SR_LOCK in use
MDS_SR_LOCK forced low
relock mode
no action
relock when lockout occurs
number of succeeding 'equal'-detections until lock
6
MDS_SR_LOCKOUT
R/W
0
1
5
MDS_SR_LOCK
R/W
0
1
4
MDS_RELOCK
R/W
0
1
-
3 to 0
MDS_LOCK_DELAY[3:0]
R/W
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相關代理商/技術參數 |
參數描述 |
|---|---|
| DAC1627D1G25HN/C1, | 功能描述:調節(jié)器/解調器 DUAL 16b 1.25GSPS to 1.25 Gsps RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| DAC1627D1G25HN/C1,551 | 功能描述:調節(jié)器/解調器 Dual 16-bit DAC, up to 1.25 Gsps RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| DAC1627D1G25HN-C1 | 功能描述:數模轉換器- DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1627D1G25HN-C18 | 制造商:Integrated Device Technology Inc 功能描述:HVQFN72 - Tape and Reel |
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