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參數(shù)資料
| 型號： | CS8952-IQZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 59/81頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX 100/10 PHY 100TQFP |
| 標準包裝： | 90 |
| 類型： | 收發(fā)器 |
| 規(guī)程： | MII |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 759 (CN2011-ZH PDF) |
| 其它名稱： | 598-1208 |
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CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
62
DS206F1
7. DESIGN CONSIDERATIONS
The CS8952 is a mixed-signal device containing
the high-speed digital and analog circuits required
to implement Fast Ethernet communication. It is
important the designer adhere to the following
guidelines and recommendations for proper and re-
liable operation of the CS8952. These guidelines
will also benefit the design with good EMC perfor-
mance.
7.1
Twisted Pair Interface
The recommended connection of the twisted-pair
interface is shown if Figure 6. The unused cable
pairs are terminated to increase the common-mode
performance. Common-mode performance is also
improved by connecting the center taps of the RX
and TX input circuits to the DC-isolated ground
plane. The 0.01 F capacitor C1 must provide 2 kV
(1,500 Vrms for 60 seconds) of isolation to meet
802.3 requirements. If a shielded RJ45 connector is
used (recommended), the shield should be connect-
ed to chassis ground.
7.2
100BASE-FX Interface
Figure 7 shows the recommended connection for a
100BASE-FX interface to a Hewlett-Packard
HFBR-5103 fiber transceiver. Termination circuit-
ry may need to be revised for other fiber transceiv-
ers. The FX Drive bit in the Loopback, Bypass, and
Receiver Error Mask Register (address 18h) may
be used to tailor the PECL interface for 50
or
150
loads.
0
Jabber Enable
Read/Write 1
When set, the jabber function is enabled. When
clear, and if the CS8952 is in 10BASE-T full-duplex
or 10BASE-T ENDEC loopback mode, the jabber
function is disabled.
Note: When the National Compatibility Mode bit (bit
7) is set, the Jabber function may also be disabled
for 10BASE-T half-duplex, although this is not rec-
ommended.
BIT
NAME
TYPE
RESET
DESCRIPTION
49.9
49.9
0.1 F
CS8952
TX+
TX-
RX+
RX-
80
81
91
92
NC
16
15
2
1
14
3
10
11
6
7
12
T1
TG22-3506
5
51
75
0.01 F
75
51
51
51
51
1
2
3
4
5
6
7
8
RJ-45
SHLD
2KV
51
Figure 6. Recommended Connection of Twisted-Pair Ports (Network Interface Card)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS8952-IQZR | 功能描述:以太網(wǎng) IC IC 100BASE-TX and 10BASE-T Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| CS8952T | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-CQ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQR | 制造商:Cirrus Logic 功能描述:ETHERNET TXRX SGL CHIP 1-PORT 5V 10MBPS/100MBPS 100TQFP - Tape and Reel |
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