參數(shù)資料
型號： CS61584A-IQ3Z
廠商： Cirrus Logic Inc
文件頁數(shù)： 21/47頁
文件大小： 0K
描述： IC LINE INTERFACE T1/E1 64LQFP
標(biāo)準(zhǔn)包裝： 160
接口： 并行/串行
電源電壓： 3.3V，5V
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
安裝類型： 表面貼裝
產(chǎn)品目錄頁面： 759 (CN2011-ZH PDF)
其它名稱： 598-1713
CS61584A
28
DS261PP5
sate for waveform degradation that may result from
non-standard cables, transformers, or protection
circuitry.
Arbitrary waveform generation is enabled when the
CON[3:0] line configuration selection in the Con-
trol B register is set to one of four arbitrary wave-
form modes (See the Transmitter section). The
arbitrary pulse shape of mark (a transmitted "1") is
specified by describing the pulse shape across three
Unit Intervals (UIs). One UI in DS1 applications is
648 ns (1.544 MHz period) and one UI in E1 appli-
cations is 488 ns (2.048 MHz period). For example,
arbitrary waveform generation allows the DSX-1
return-to-zero "tail" to extend further into the next
UI or allows T1 long-haul waveforms to be defined
across all three UIs. The amplitude of a space (a
transmitted "0") is fixed at zero volts.
All three UIs are divided into 14 equal phases for a
total of 42 phase segments. The shape of the pulse
is then defined by writing the amplitude of each
phase segment to the Arbitrary Waveform register
42 times in sequence from UI1/phase1 to
UI3/phase14. The custom pulse shape must be de-
fined using the Arbitrary Waveform register before
setting the CON[3:0] configuration selection to one
of the arbitrary generation settings (i.e., 1001,
1010, or 1011).
For DS1 applications, the CS61584A divides the
648 ns UI into 14 equal phases of 46.3 ns. For
DSX-1 applications, the 648 ns UI is divided into
13 equal phases of 49.8 ns. The phase amplitude in-
formation written for phase 14 of each UI is ig-
nored. For E1 applications, the 488 ns UI is divided
into 12 equal phases of 40.7 ns. The phase ampli-
Arbitrary Waveform Register (Channel 1)
Serial Port Address: 0x18; Parallel Port Address: 0xY8
Bit
Description
Definition
Reset
Value
10
70
Arbitrary pulse shape definitions
undefined
6MSB
5
4
3
2
1
0LSB
Arbitrary Waveform Register (Channel 2)
Serial Port Address: 0x19; Parallel Port Address: 0xY9
Bit
Description
Definition
Reset
Value
10
7
0
Arbitrary pulse shape definitions
undefined
6MSB
5
4
3
2
1
0LSB
Table 9. Arbitrary Waveform Registers
CS61584A
28
DS261F1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CS61584A-IQ3ZR 功能描述:網(wǎng)絡(luò)控制器與處理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
CS61584A-IQ5 功能描述:網(wǎng)絡(luò)控制器與處理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
CS61584A-IQ5Z 功能描述:網(wǎng)絡(luò)控制器與處理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
CS61584A-IQ5ZR 功能描述:網(wǎng)絡(luò)控制器與處理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
CS61584-IL3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Line Interface
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