參數(shù)資料
型號： CC113LRTKT
廠商： TEXAS INSTRUMENTS INC
元件分類： 無繩電話/電話
英文描述： TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQCC20
封裝： 4 X 4 MM, GREEN, PLASTIC, VQFN-20
文件頁數(shù)： 30/75頁
文件大?。?/td> 1454K
代理商： CC113LRTKT
CC113L
SWRS108A
Page 36 of 68
CC113L has a built-in state machine that is used
to switch between different operational states
(modes). The change of state is done either by
using command strobes or by internal events
such as RX FIFO overflow.
A simplified state diagram, together with
typical usage and current consumption, is
shown in Figure 12 on page 20. The complete
radio control state diagram is shown in Figure
21. The numbers refer to the state number
readable in the MARCSTATE status register.
This register is primarily for test purposes.
18.1 Power-On Start-Up Sequence
When the power supply is turned on, the
system must be reset. This is achieved by one
of the two sequences described below, i.e.
automatic power-on reset (POR) or manual
reset. After the automatic power-on reset or
manual reset, it is also recommended to
change the signal that is output on the GDO0
pin. The default setting is to output a clock
signal with a frequency of CLK_XOSC/192.
However, to optimize performance in RX, an
alternative GDO setting from the settings
found in Table 29 on page 42 should be
selected.
18.1.1 Automatic POR
A power-on reset circuit is included in the
CC113L. The minimum requirements stated in
Table 11 must be followed for the power-on
reset to function properly. The internal power-
up sequence is completed when CHIP_RDYn
goes low. CHIP_RDYn is observed on the SO
pin after CSn is pulled low. See Section 10.1
for more details on CHIP_RDYn.
When the CC113L reset is completed, the chip
will be in the IDLE state and the crystal
oscillator will be running. If the chip has had
sufficient time for the crystal oscillator to
stabilize after the power-on-reset, the SO pin
will go low immediately after taking CSn low. If
CSn is taken low before reset is completed,
the SO pin will first go high, indicating that the
crystal oscillator is not stabilized, before going
low as shown in Figure 22.
XOSC Stable
CSn
SO
Figure 22: Power-On Reset
18.1.2 Manual Reset
The other global reset possibility on CC113L
uses the SRES command strobe. By issuing
this strobe, all internal registers and states are
set to the default, IDLE state. The manual
power-up sequence is as follows (see Figure
Set SCLK = 1 and SI = 0.
Strobe CSn low / high.
Hold CSn low and then high for at least
40 s relative to pulling CSn low
Pull CSn low and wait for SO to go low
(CHIP_RDYn).
Issue the SRES strobe on the SI line.
When
SO
goes
low
again, reset
is
complete and the chip is in the IDLE state.
CSn
SO
XOSC Stable
XOSC and voltage regulator switched on
SI
SRES
40 us
Figure 23: Power-On Reset with
Note that the above reset procedure is
only required just after the power supply is
first turned on. If the user wants to reset
the CC113L after this, it is only necessary to
issue an SRES command strobe.
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