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參數(shù)資料
| 型號： | BU-65170G1-290 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDSO70 |
| 封裝： | CERAMIC PACKAGE-70 |
| 文件頁數(shù)： | 5/47頁 |
| 文件大?。?/td> | 1143K |
| 代理商： | BU-65170G1-290 |
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13
Data Device Corporation
www.ddc-web.com
BU-65170/61580/61585
T-6/09-0
typical BC memory map of TABLE 25. The maximum size of a BC
message block is 38 words, for an RT-to-RT transfer of 32 Data
Words (Control + 2 Commands + Loopback + 2 Status Words +
32 Data Words). Note, however, that this example assumes the
disabling of the 256-word boundaries.
BC MEMORY MANAGEMENT
FIGURE 3 illustrates the BU-61580's BC memory management
scheme. One of the BC memory management features is the
global double buffering mechanism. This provides for two sets of
the various BC mode data structures: Stack Pointer and Message
Counter locations, Descriptor Stack areas, and BC message
blocks. Bit 13 of Configuration Register #1 selects the current
active area. At any point in time, the BU-61580's internal 1553
memory management logic may access only the various data
structures within the “active” area. FIGURE 3 delineates the
“active” and “inactive” areas by the nonshaded and shaded
areas, respectively; however, at any point in time,
both the
“active” and “nonactive” areas are accessible by the host
processor. In most applications, the host processor will access
the “nonactive” area, while the 1553 bus processes the “active”
area messages.
The BC may be programmed to transmit multimessage frames of
up to 512 messages. The number of messages to be processed
is programmable by the Active Area Message Count location in
the shared RAM, initialized by the host processor. In addition, the
host processor must initialize another location, the Active Area
Stack Pointer. The Stack Pointer references the four-word mes-
sage block descriptor in the Stack area of shared RAM for each
message to be processed. The BC Stack size is programmable
with choices of 256, 512, 1024, and 2048 words.
In the BC Frame Auto-Repeat mode, the Initial Stack Pointer and
Initial Message Counter locations must be loaded by the host
prior to the processing of the first frame. The single frame mode
does not use these two locations.
The third and fourth words of the BC block descriptor are the
Intermessage Gap Time and the Message Block Address for the
respective message. These two memory locations must be writ-
ten by the host processor prior to the start of message process-
ing. Use of the Intermessage Gap Time is optional. The Block
Address pointer specifies the starting location for each message
block. The first word of each BC message block is the BC Control
Word.
At the start and end of each message, the Block Status and Time
Tag Words write to the message block descriptor in the stack.
The Block Status Word includes indications of message in pro-
FIGURE 2. BC MESSAGE GAP AND FRAME TIMING
MESSAGE NO. 1
MESSAGE NO. 2
MESSAGE NO. 1
MESSAGE
GAP TIME
FOR MESSAGE NO. 1
BC FRAME TIME
INTERMESSAGE GAP TIME
cess or message completion, bus channel, status set, response
timeout, retry count, status address mismatch, loop test (on-line
self-test) failure, and other error conditions. TABLE 21 illustrates
the bit mapping of the BC Block Status word. The 16-bit Time Tag
Word will reflect the current contents of the internal Time Tag
Register. This read/writable register, which operates for all three
modes, has programmable resolution of from 2 to 64 s/LSB. In
addition, the Time Tag register may be clocked from an external
source.
BC MESSAGE BlOCk FORMATS ANd BC CONTROl
WORd
In BC mode, the BU-61580 supports all MIL-STD-1553 message
formats. For each 1553 message format, the BU-61580 man-
dates a specific sequence of words within the BC Message
Block. This includes locations for the Control, Command and
(transmitted) Data Words that are to be read from RAM by the
BC protocol logic. In addition, subsequent contiguous locations
must be allocated for storage of received Loopback, RT Status
and Data Words. FIGURE 4 illustrates the organization of the BC
message blocks for the various MIL-STD-1553 message for-
mats. Note that for all of the message formats, the BC Control
Word is located in the first location of the message block.
For each of the BC Message Block formats, the first word in the
block is the BC Control Word. The BC Control Word is not trans-
mitted on the 1553 bus. Instead, it contains bits that select the
active bus and message format; enable off-line self-test; mask-
ing of Status Word bits; enable retries and interrupts; and speci-
fies MIL-STD-1553A or -1553B error handling. The bit mapping
and definitions of the BC Control Word are illustrated in
TABLE 8.
The BC Control Word is followed by the Command Word to be
transmitted, and subsequently by a second Command Word (for
an RT-to-RT transfer), followed by Data Words to be transmitted
(for Receive commands). The location after the last word to be
transmitted is reserved for the Loopback Word. The Loopback
Word is an on-line self-test feature. The subsequent locations
after the Loopback Word are reserved for received Status Words
and Data Words (for Transmit commands).
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| BU-65565F4-300N | 4 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, XMA |
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| BU-65565F4-900 | 4 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, XMA |
| BU-65565C2-300 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, XMA |
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| BU65170G5-100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| BU65170G5-110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| BU65170G5-120 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| BU65170G5-200 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
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