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參數(shù)資料
| 型號(hào)： | BU-65170G1-290 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDSO70 |
| 封裝： | CERAMIC PACKAGE-70 |
| 文件頁數(shù)： | 45/47頁 |
| 文件大?。?/td> | 1143K |
| 代理商： | BU-65170G1-290 |
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Data Device Corporation
www.ddc-web.com
BU-65170/61580/61585
T-6/09-0
BC/RT Command Stack Pointer Register allows the host CPU
to determine the pointer location for the current or most recent
message when the BU-61580 is in BC or RT modes.
BC Control Word/RT Subaddress Control Word Register: In
BC mode, it allows host access to the current, or most recent BC
Control Word. The BC Control Word contains bits that select the
active bus and message format, enable off-line self-test, mask-
ing of Status Word bits, enable retries and interrupts, and speci-
fy MIL-STD-1553A or -1553B error handling. In RT mode, this
register allows host access to the current or most recent
Subaddress Control Word. The Subaddress Control Word is
used to select the memory management scheme and enable
interrupts for the current message. The read/write accessibility
can be used as an aid for testing the ACE.
TimeTag Register maintains the value of a real-time clock.The resolu-
tion of this register is programmable from among 2, 4, 8, 16, 32, and 64
s/LSB.TheTAG_CLK input signal also may cause an external oscillator
to clock the Time Tag Register. Start-of-Message (SOM) and End-of-
Message (EOM) sequences in BC, RT, and Message Monitor modes
cause a write of the current value of the Time Tag Register to the stack
area of RAM.
Interrupt Status Register mirrors the Interrupt Mask Register and con-
tains a Master Interrupt bit. It allows the host processor to determine the
cause of an interrupt request by means of a single READ operation.
Configuration Registers #3,#4,and #5 are used to enable many of the
BU-61580's advanced features. These include all the enhanced mode
features; that is, all the functionality beyond that of the previous genera-
tion product, the BUS-61559 Advanced Integrated Mux Hybrid with
Enhanced RT Features (AIM-HY'er). For all three modes, use of the
Enhanced Mode enables the various read-only bits in Configuration
Register #1. For BC mode, the enhanced mode features include the
expanded BC Control Word and BC Block Status Word, additional Stop-
On-Error and Stop-On-Status Set functions, frame auto-repeat, pro-
grammable intermessage gap times, automatic retries, expanded Status
Word Masking, and the capability to generate interrupts following the
completion of any selected message.For RT mode, the enhanced mode
features include the expanded RT Block Status Word, the combined RT/
Selective Message Monitor mode, internal wrapping of the RTFAIL out-
put signal (from the J chip) to the RTFLAG RT Status Word bit, the
double buffering scheme for individual receive (broadcast) subaddress-
es, and the alternate (fully software programmable) RT Status Word. For
MT mode, use of the enhanced mode enables use of the Selective
Message Monitor, the combined RT/Selective Monitor modes, and the
monitor triggering capability.
Data Stack Address Register is used to point to the current address
location in shared RAM used for storing message words (second
Command Words, Data Words, RT Status Words) in the Selective Word
Monitor mode.
FrameTime Remaining Register provides a read only indication of the
time remaining in the current BC frame.The resolution of this register is
100 s/LSB.
MessageTime Remaining Register provides a read only indication of
the time remaining before the start of the next message in a BC frame.
The resolution of this register is 1 s/LSB.
BC Frame/RT Last Command/MT Trigger Word Register: In BC
mode, it programs the BC frame time, for use in the frame auto-repeat
mode.The resolution of this register is 100 s/LSB, with a range of 6.55
seconds; in RT mode, this register stores the current (or most previous)
1553 Command Word processed by the ACE RT; in the Word Monitor
mode, this register specifies a 16-bit Trigger (Command) Word. The
Trigger Word may be used to start or stop the monitor, or to generate
interrupts.
Status Word Register and BIT Word Registers provide read-only
indications of the BU-65170/61580's RT Status and BIT Words.
Test Mode Registers 0-7: These registers may be used to facilitate
production or maintenance testing of the BU-65170/61580 and systems
incorporating the BU-65170/61580.
TABLE 2. ADDRESS MAPPING
ADDRESS LINES
REGISTER
DESCRIPTION/ACCESSIBILITY
HEX A4 A3 A2 A1 A0
00
0
0 Interrupt Mask Register (RD/WR)
01
0
1 Configuration Register #1 (RD/WR)
02
0
1
0 Configuration Register #2 (RD/WR)
03
0
1
1 Start/Reset Register (WR)
03
0
1
BC/RT Command Stack Pointer Register
(RD)
04
0
1
0
BC Control Word*/RT Subaddress Control
Word Register (RD/WR)
05
0
1
0
1 Time Tag Register (RD/WR)
06
0
1
0 Interrupt Status Register (RD)
07
0
1
1 Configuration Register #3 (RD/WR)
08
0
1
0
0 Configuration Register #4 (RD/WR)
09
0
1
0
1 Configuration Register #5 (RD/WR)
0A
0
1
0
1
0 Data Stack Address Register (RD)
*
0B
0
1
0
1
1 BC Frame Time Remaining Register (RD)*
0C
0
1
0
BC Time Remaining to Next Message
Register (RD)
*
0D
0
1
0
1
BC Frame Time
*/RT Last Command/MT
Trigger Word* Register (RD/WR)
0E
0
1
0 RT Status Word Register (RD)
0F
0
1
1 RT BIT Word Register (RD)
10
1
0
0 Test Mode Register 0
17
1
0
1
1 Test Mode Register 7
18
1
0
0 reserved
1F
1
1 reserved
* Not applicable to BU-65170/61571
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