參數(shù)資料
型號： ATMEGA103-6AI
廠商： Atmel
文件頁數(shù)： 93/141頁
文件大?。?/td> 0K
描述： IC MCU 128K 6MHZ A/D IT 64TQFP
產(chǎn)品培訓模塊： megaAVR Introduction
標準包裝： 90
系列： AVR® ATmega
核心處理器： AVR
芯體尺寸： 8-位
速度： 6MHz
連通性： SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 128KB（64K x 16）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 托盤
配用： ATSTK501-ND - ADAPTER KIT FOR 64PIN AVR MCU
55
ATmega103(L)
0945I–AVR–02/07
Watchdog Timer
The Watchdog Timer is clocked from a separate On-chip Oscillator. By controlling the
Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as shown in
Table 21. See characterization data for typical values at other V
CC levels. The WDR
(Watchdog Reset) instruction resets the Watchdog Timer. From the Watchdog Reset,
eight different clock cycle periods can be selected to determine the reset period. If the
reset period expires without another Watchdog Reset, the ATmega103(L) resets and
executes from the Reset Vector. For timing details on the Watchdog Reset, refer to
To prevent unintentional disabling of the Watchdog, a special turn-off procedure must
be followed when the Watchdog is disabled. Refer to the description of the Watchdog
Timer Control Register for details.
Figure 36. Watchdog Timer
Watchdog Timer Control
Register – WDTCR
Bits 7..5 – Res: Reserved Bits
These bits are reserved bits in the ATmega103(L) and will always read as zero.
Bit 4 – WDTOE: Watchdog Turn-off Enable
This bit must be set (one) when the WDE bit is cleared, Otherwise, the Watchdog will
not be disabled. Once set, hardware will clear this bit to zero after four clock cycles.
Refer to the description of the WDE bit for a Watchdog disable procedure.
Bit 3 – WDE: Watchdog Enable
When the WDE is set (one), the Watchdog Timer is enabled and if the WDE is cleared
(zero), the Watchdog Timer function is disabled. WDE can only be cleared if the
WDTOE bit is set (one). To disable an enabled Watchdog Timer, the following proce-
dure must be followed:
1 MHz at V
CC = 5V
350 kHz at V
CC = 3V
Oscillator
Bit
765
43
21
0
$21 ($41)
–
WDTOE
WDE
WDP2
WDP1
WDP0
WDTCR
Read/Write
R
R/W
Initial Value
0
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參數(shù)描述
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ATMEGA103L-4AC 功能描述:8位微控制器 -MCU TQFP-64 128K FLASH 3 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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