參數(shù)資料
型號： ATMEGA103-6AI
廠商： Atmel
文件頁數(shù)： 77/141頁
文件大?。?/td> 0K
描述： IC MCU 128K 6MHZ A/D IT 64TQFP
產(chǎn)品培訓模塊： megaAVR Introduction
標準包裝： 90
系列： AVR® ATmega
核心處理器： AVR
芯體尺寸： 8-位
速度： 6MHz
連通性： SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 128KB（64K x 16）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 托盤
配用： ATSTK501-ND - ADAPTER KIT FOR 64PIN AVR MCU
40
ATmega103(L)
0945I–AVR–02/07
Figure 31. Timer/Counter2 Block Diagram
The 8-bit Timer/Counter0 can select clock source from PCK0 or prescaled PCK0. The 8-
bit Timer/Counter2 can select clock source from CK, prescaled CK or an external pin.
Both Timer/Counters can be stopped as described in the specification for the
Timer/Counter Control Registers – TCCR0 and TCCR2.
The different Status Flags (Overflow, Compare Match and Capture Event) are found in
the Timer/Counter Interrupt Flag Register (TIFR). Control signals are found in the
Timer/Counter Control Registers – TCCR0 and TCCR2. The interrupt enable/disable
settings are found in the Timer/Counter Interrupt Mask Register (TIMSK).
When Timer/Counter2 is externally clocked, the external signal is synchronized with the
Oscillator frequency of the CPU. To assure proper sampling of the external clock, the
minimum time between two external clock transitions must be at least one internal CPU
clock period. The external clock signal is sampled on the rising edge of the internal CPU
clock.
The 8-bit Timer/Counters feature a high-resolution and a high-accuracy usage with the
lower prescaling opportunities. Similarly, the high prescaling opportunities make these
units useful for lower speed functions or exact timing functions with infrequent actions.
Both Timer/Counters support two Output Compare functions using the Output Compare
Registers (OCR0 and OCR2) as the data source to be compared to the Timer/Counter
contents. The Output Compare functions include optional clearing of the counter on
compare match and action on the Output Compare pins – PB4(OC0/PWM0) and
PB7(OC2/PWM2) – on compare match.
Timer/Counters 0 and 2 can also be used as 8-bit Pulse Width Modulators. In this mode
the Timer/Counter and the Output Compare Register serve as a glitch-free, stand-alone
PWM with centered pulses. Refer to page 43 for a detailed description of this function.
8-BIT
D
A
T
A
B
U
S
T/C2 CONTROL
REGISTER (TCCR2)
TIMER INT. FLAG
REGISTER (TIFR)
TIMER/COUNTER2
(TCNT2)
8-BIT COMPARATOR
OUTPUT COMPARE
REGISTER2 (OCR2)
TIMER INT. MASK
REGISTER (TIMSK)
0
7
T/C CLK SOURCE
UP/DOWN
T/C CLEAR
CONTROL
LOGIC
CS22
COM21
PWM2
OCF0
TO
V
0
TO
V
1
OCF2A
OCF2B
ICF1
TO
V
2
OCF2
TO
V
2
OCIE0
T
O
IE0
T
O
IE1
OCIE1A
OCIE1B
TICIE1
T
O
IE2
OCIE2
CS21
COM20
CS20
CTC2
CK
T/C2 OVER-
FLOW IRQ
T/C2 COMPARE
MATCH IRQ
T2
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