參數(shù)資料
型號： ATMEGA103-6AI
廠商： Atmel
文件頁數(shù)： 10/141頁
文件大小： 0K
描述： IC MCU 128K 6MHZ A/D IT 64TQFP
產(chǎn)品培訓(xùn)模塊： megaAVR Introduction
標(biāo)準(zhǔn)包裝： 90
系列： AVR® ATmega
核心處理器： AVR
芯體尺寸： 8-位
速度： 6MHz
連通性： SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 128KB（64K x 16）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 托盤
配用： ATSTK501-ND - ADAPTER KIT FOR 64PIN AVR MCU
107
ATmega103(L)
0945I–AVR–02/07
Enter Programming Mode
The following algorithm puts the device in Parallel Programming mode:
1.
Apply supply voltage according to Table 36, between V
CC and GND.
2.
Set RESET and BS1 pins to “0” and wait at least 100 ns.
3.
Apply 11.5 - 12.5V to RESET. Any activity on BS1 within 100 ns after +12V has
been applied to RESET will cause the device to fail entering Programming mode.
Chip Erase
The Chip Erase will erase the Flash and EEPROM memories, and Lock bits. The Lock
bits are not reset until the Program memory has been completely erased. The Fuse bits
are not changed. A chip erase must be performed before the Flash or EEPROM is
reprogrammed.
Load Command “Chip Erase”
1.
Set XA1, XA0 to “10”. This enables command loading.
2.
Set BS1 to “0”.
3.
Set DATA to “1000 0000”. This is the command for Chip Erase.
4.
Give XTAL1 a positive pulse. This loads the command.
5.
Give WR a t
WLWH_CE wide negative pulse to execute Chip Erase. See Table 40 for
t
WLWH_CE value. Chip Erase does not generate any activity on the RDY/BSY pin.
Programming the Flash
The Flash is organized as 512 pages of 256 bytes each. When programming the Flash,
the program data is latched into a page buffer. This allows one page of program data to
be programmed simultaneously. The following procedure describes how to program the
entire Flash memory:
A: Load Command “Write Flash”.
1.
Set XA1, XA0 to “10”. This enables command loading.
2.
Set BS1 to “0”.
3.
Set DATA to “0001 0000”. This is the command for Write Flash.
4.
Give XTAL1 a positive pulse. This loads the command.
B: Load Address Low Byte.
1.
Set XA1, XA0 to “00”. This enables address loading.
2.
Set BS1 to “0”. This selects low address.
3.
Set DATA = Address Low Byte ($00 - $FF)
4.
Give XTAL1 a positive pulse. This loads the address Low Byte.
C: Load Data Low Byte.
1.
Set BS1 to “0”. This selects low data.
2.
Set XA1, XA0 to “01”. This enables data loading.
3.
Set DATA = Data Low Byte ($00 - $FF).
4.
Give XTAL1 a positive pulse. This loads the data byte.
D: Latch Data Low Byte.
1.
Give PAGEL a positive pulse. This latches the data Low Byte.
(See Figure 73 for signal waveforms.)
Table 40. Minimum WR Pulse Width for Chip Erase
Symbol
3.2V
3.6V
4.0V
5.0V
tWLWH_CE
56 ms
43 ms
35 ms
22 ms
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