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參數資料
| 型號： | AM49BDS640AHE9I |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲器 |
| 英文描述： | Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA89 |
| 封裝： | 10 X 8 MM, FBGA-89 |
| 文件頁數： | 64/84頁 |
| 文件大?。?/td> | 763K |
| 代理商： | AM49BDS640AHE9I |
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62
Am49BDS640AH
December 5, 2003
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Notes:
1. PA = Program Address, PD = Program Data, VA = Valid Address for reading status bits.
2. “In progress” and “complete” refer to status of program operation.
3. A21–A12 are don’t care during command sequence unlock cycles.
4. CLK can be either V
IL
or V
IH
.
5. The Asynchronous programming operation is independent of the Set Device Read Mode bit in the Configuration Register.
Figure 32.
Asynchronous Program Operation Timings: WE# Latched Addresses
OE#
CE#f
Data
Addresses
AVD#
WE#
CLK
V
CC
f
555h
PD
t
AS
t
AVSW
t
AVHW
t
AH
t
WC
t
WPH
PA
t
VCS
t
WP
t
DH
t
CH
In
Progress
t
WHWH1
VA
Complete
VA
Program Command Sequence (last two cycles)
Read Status Data
t
DS
V
IH
V
IL
t
AVDP
A0h
t
CS
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