參數(shù)資料
型號(hào)： AM49BDS640AHE8I
廠商： SPANSION LLC
元件分類： 存儲(chǔ)器
英文描述： Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA89
封裝： 10 X 8 MM, FBGA-89
文件頁數(shù)： 39/84頁
文件大?。?/td> 763K
代理商： AM49BDS640AHE8I
December 5, 2003
Am49BDS640AH
37
A D V A N C E I N F O R M A T I O N
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the rising edge of the AVD# pulse or active edge of CLK which
ever comes first.
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A21–A12 uniquely select any sector.
BA = Address of the bank (A21, A20) that is being switched to
autoselect mode, is in bypass mode, or is being erased.
SLA = Address of the sector to be locked. Set sector address (SA) and
either A6 = 1 for unlocked or A6 = 0 for locked.
CR = Configuration Register address bits A19–A12.
OW = Address (A7–A0) is (00011010).
PD3–PD0 = Password Data. PD3–PD0 present four 16 bit
combinations that represent the 64-bit Password
PWA = Password Address. Address bits A1 and A0 are used to select
each 16-bit portion of the 64-bit entity.
PWD = Password Data.
PL = Address (A7-A0) is (00001010)
RD(0) = DQ0 protection indicator bit. If protected, DQ0 = 1, if
unprotected, DQ0 = 0.
RD(1) = DQ1 protection indicator bit. If protected, DQ1 = 1, if
unprotected, DQ1 = 0.
SL = Address (A7-A0) is (00010010)
WD= Write Data. See “Configuration Register” definition for specific
write data
WP = Address (A7-A0) is (00000010)
Notes:
1.
2.
See Table 1 for description of bus operations.
All values are in hexadecimal.
3.
Except for the following, all bus cycles are write cycle: read cycle,
fourth through sixth cycles of the Autoselect commands, fourth
cycle of the configuration register verify and password verify
commands, and any cycle reading at RD(0) and RD(1).
4.
Data bits DQ15–DQ8 are don’t care in command sequences,
except for RD, PD, WD, PWD, and PD3-PD0.
5.
6.
Unless otherwise noted, address bits A21–A12 are don’t cares.
Writing incorrect address and data values or writing them in the
improper sequence may place the device in an unknown state.
The system must write the reset command to return the device to
reading array data.
No unlock or command cycles required when bank is reading
array data.
The Reset command is required to return to reading array data
(or to the erase-suspend-read mode if previously in Erase
7.
8.
Suspend) when a bank is in the autoselect mode, or if DQ5 goes
high (while the bank is providing status information) or performing
sector lock/unlock.
9.
The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address. See the
Autoselect Command Sequence section for more information.
10. The data is 0000h for an unlocked sector and 0001h for a locked
sector
11. DQ15 - DQ8 = 0, DQ7: Factory Lock Bit (1 = Locked, 0 = Not
Locked), DQ6: Customer Lock Bit (1 = Locked, 0 = Not Locked),
DQ5: Handshake Bit (1 = Reduced wait-state Handshake, 0 =
Standard Handshake), DQ4 - DQ0 = 0
12. The Unlock Bypass command sequence is required prior to this
command sequence.
13. The Unlock Bypass Reset command is required to return to
reading array data when the bank is in the unlock bypass mode.
PPB
Command
s
PPB Program (Notes 18,
19, 21)
6
555
AA
2AA
55
555
60
(SA)
+ WP
68
(SA)
+ WP
48
XX
RD
(0)
All PPB Erase (Notes
18, 19, 22, 24)
6
555
AA
2AA
55
555
60
WP
60
WP
40
XX
RD
(0)
PPB Status (Note 25)
4
555
AA
2AA
55
(BA)
555
90
(SA)
X02
RD
(0)
PPB Lock
Bit
PPB Lock Bit Set
3
555
AA
2AA
55
555
78
PPB Lock Bit Status
(Note 19)
4
555
AA
2AA
55
(BA)
555
58
SA
RD
(1)
DYB
DYB Write
4
555
AA
2AA
55
555
48
SA
X1
DYB Erase
4
555
AA
2AA
55
555
48
SA
X0
DYB Status
4
555
AA
2AA
55
(BA)
555
58
SA
RD
(0)
Password Protection Mode Locking
Bit Program (Notes 18, 19, 21)
6
555
AA
2AA
55
555
60
PL
68
PL
48
PL
RD
(0)
Persistent Protection Mode Locking
Bit Program (Notes 18, 19, 21)
6
555
AA
2AA
55
555
60
SL
68
SL
48
SL
RD
(0)
Password Protection Mode Locking
Bit Read (Notes 18, 19, 21)
4
555
AA
2AA
55
555
60
PL
RD
(0)
Persistent Protection Mode Locking
Bit Read (Notes 18, 19, 21)
4
555
AA
2AA
55
555
60
SL
RD
(0)
Command Sequence
(Note 1)
C
Bus Cycles (Notes 1–6)
First
Second
Third
Fourth
Fifth
Sixth
Seventh
Addr
Data Addr Data
Addr
Data
Addr
Data
Addr Data Addr Data Addr Data
相關(guān)PDF資料
PDF描述
AM49BDS640AHE9I Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
AM49DL320BGT701 Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
AM49DL320BGB701 Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
AM49DL320BGB70IS Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
AM49DL320BGB70IT Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM49BDS640AHE9I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
AM49DL3208G 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am49DL3208G - Stacked Multi-Chip Package (MCP) Flash Memory and pSRAM
AM49DL320BG 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am49DL320BG - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM49DL320BGB701 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
AM49DL320BGB701S 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit) Pseudo Static RAM
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*