參數(shù)資料
型號： AM49BDS640AHE8I
廠商： SPANSION LLC
元件分類： 存儲器
英文描述： Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA89
封裝： 10 X 8 MM, FBGA-89
文件頁數(shù)： 12/84頁
文件大?。?/td> 763K
代理商： AM49BDS640AHE8I
10
Am49BDS640AH
December 5, 2003
A D V A N C E I N F O R M A T I O N
PIN DESCRIPTION
A19–A0
=
20 Address Inputs (Common)
A21–A20
=
2 Address Inputs (Flash)
DQ15–DQ0
=
16 Data Inputs/Outputs (Common)
CE#f
=
Chip Enable (Flash)
CE1#s
=
Chip Enable 1 (SRAM)
CE2s
=
Chip Enable 2 (SRAM)
OE#
=
Output Enable (Common)
WE#
=
Write Enable (Common)
UB#s
=
Upper Byte Control (pSRAM)
LB#s
=
Lower Byte Control (pSRAM)
RESET#
=
Hardware Reset Pin, Active Low
V
CC
f
=
Flash 1.8 volt-only single power
supply (see Product Selector Guide
for speed options and voltage supply
tolerances)
V
IO
f
=
Input & Output Buffer Power Supply
must be tied to V
CC
SRAM Power Supply
V
CC
s
V
SSIO
f
V
SS
NC
=
=
Output Buffer Ground
=
Device Ground (Common)
=
Pin Not Connected Internally
RDY
=
Ready output; indicates the status of
the Burst read. Low = data not valid
at expected time. High = data valid.
CLK
=
CLK is not required in asynchronous
mode. In burst mode, after the initial
word is output, subsequent active
edges of CLK increment the internal
address counter.
AVD#
=
Address Valid input. Indicates to de-
vice that the valid address is present
on the address inputs (A21–A0).
Low = for asynchronous mode, indi-
cates valid address; for burst mode,
causes starting address to be
latched.
High = device ignores address in-
puts
WP#
=
Hardware write protect input. At V
IL
,
disables program and erase func-
tions in the two outermost sectors.
Should be at V
IH
for all other condi-
tions.
ACC
=
At V
ID
, accelerates programming;
automatically places device in un-
lock bypass mode. At V
IL
, locks all
sectors. Should be at V
IH
for all
other conditions.
LOGIC SYMBOL
20
16
DQ15–DQ0
A19–A0
CE#f
OE#
WE#
RESET#
UB#s
RDY
WP#
A21–A20
LB#s
ACC
CE1#s
CE2s
AVD#
CLK
相關(guān)PDF資料
PDF描述
AM49BDS640AHE9I Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM49BDS640AHE9I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
AM49DL3208G 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am49DL3208G - Stacked Multi-Chip Package (MCP) Flash Memory and pSRAM
AM49DL320BG 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am49DL320BG - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
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AM49DL320BGB701S 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit) Pseudo Static RAM
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