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參數(shù)資料
| 型號(hào)： | AM42BDS640AGTD9IT |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲(chǔ)器 |
| 英文描述： | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA93 |
| 封裝： | 8 X 11.60 MM, FBGA-93 |
| 文件頁數(shù)： | 42/72頁 |
| 文件大?。?/td> | 1060K |
| 代理商： | AM42BDS640AGTD9IT |
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November 1, 2002
Am42BDS640AG
41
P R E L I M I N A R Y
AC CHARACTERISTICS
Notes:
1. Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed from two
cycles to seven cycles.
2. If any burst address occurs at a 64-word boundary, one additional clock cycle is inserted, and is indicated by RDY.
3. The device is in synchronous mode.
Figure 11.
CLK Synchronous Burst Mode Read
(rising active CLK)
Da
Da + 1
Da + n
OE#
DQ15
-
DQ0
A21
-
A0
Aa
AVD#
RDY
CLK
CE#f
t
CES
t
ACS
t
AVC
t
AVD
t
ACH
t
OE
t
RACC
t
OEZ
t
CEZ
t
IACC
t
ACC
t
BDH
7 cycles for initial access shown.
Hi-Z
Hi-Z
Hi-Z
1
2
3
4
5
6
7
t
RDYS
t
BACC
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