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| 型號： | ADUC824BSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/68頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 8K FLASH ADC/DAC 52MQFP |
| 標準包裝： | 800 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 12.58MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設備： | POR，PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 34 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 640 x 8 |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.25 V |
| 數(shù)據轉換器： | A/D 3x16b，4x24b; D/A 1x12b |
| 振蕩器型： | 內部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 52-QFP |
| 包裝： | 帶卷 (TR) |
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REV. B
ADuC824
–22–
MEMORY ORGANIZATION
As with all 8051-compatible devices, the ADuC824 has sepa-
rate address spaces for Program and Data memory as shown in
Figure 13 and Figure 14.
If the user applies power or resets the device while the
EA pin is
pulled low, the part will execute code from the external program
space, otherwise the part defaults to code execution from its
internal 8 Kbyte Flash/EE program memory. This internal code
space can be downloaded via the UART serial port while the
device is in-circuit.
EXTERNAL
PROGRAM
MEMORY
SPACE
FFFFH
2000H
1FFFH
0000H
EA = 1
INTERNAL
8 KBYTE
FLASH/EE
PROGRAM
MEMORY
PROGRAM MEMORY SPACE
READ ONLY
EA = 0
EXTERNAL
PROGRAM
MEMORY
SPACE
Figure 13. Program Memory Map
The data memory address space consists of internal and exter-
nal memory space. The internal memory space is divided into
four physically separate and distinct blocks, namely the lower
128 bytes of RAM, the upper 128 bytes of RAM, the 128 bytes
of special function register (SFR) area, and a 640-byte Flash/EE
Data memory. While the upper 128 bytes of RAM, and the SFR
area share the same address locations, they are accessed through
different address modes.
The lower 128 bytes of data memory can be accessed through
direct or indirect addressing, the upper 128 bytes of RAM can
be accessed through indirect addressing, and the SFR area is
accessed through direct addressing.
Also, as shown in Figure 13, the additional 640 Bytes of
Flash/EE Data Memory are available to the user and can be
accessed indirectly via a group of control registers mapped into
the Special Function Register (SFR) area. Access to the Flash/
EE Data memory is discussed in detail later as part of the Flash/
EE memory section in this data sheet.
The external data memory area can be expanded up to 16 Mbytes.
This is an enhancement of the 64 KByte external data memory
space available on standard 8051-compatible cores.
The external data memory is discussed in more detail in the
ADuC824 Hardware Design Considerations section.
SPECIAL
FUNCTION
REGISTERS
ACCESSIBLE
BY DIRECT
ADDRESSING
ONLY
640 BYTES
FLASH/EE DATA
MEMORY
ACCESSED
INDIRECTLY
VIA SFR
CONTROL REGISTERS
INTERNAL
DATA MEMORY
SPACE
FFH
80H
7FH
00H
UPPER
128
FFH
80H
EXTERNAL
DATA
MEMORY
SPACE
(24-BIT
ADDRESS
SPACE)
000000H
DATA MEMORY SPACE
READ/WRITE
(PAGE 159)
(PAGE 0)
00H
9FH
FFFFFFH
LOWER
128
ACCESSIBLE
BY
INDIRECT
ADDRESSING
ONLY
ACCESSIBLE
BY
DIRECT
AND INDIRECT
ADDRESSING
Figure 14. Data Memory Map
The lower 128 bytes of internal data memory are mapped as shown
in Figure 15. The lowest 32 bytes are grouped into four banks
of eight registers addressed as R0 through R7. The next 16 bytes
(128 bits), locations 20 Hex through 2 FHex above the regis-
ter banks, form a block of directly addressable bit locations at
bit addresses 00H through 7FH. The stack can be located any-
where in the internal memory address space, and the stack depth
can be expanded up to 256 bytes.
BIT-ADDRESSABLE
(BIT ADDRESSES)
FOUR BANKS OF EIGHT
REGISTERS
R0 R7
BANKS
SELECTED
VIA
BITS IN PSW
11
10
01
00
07H
0FH
17H
1FH
2FH
7FH
00H
08H
10H
18H
20H
RESET VALUE OF
STACK POINTER
30H
GENERAL-PURPOSE
AREA
Figure 15. Lower 128 Bytes of Internal Data Memory
Reset initializes the stack pointer to location 07 Hex and incre-
ments it once to start from locations 08 Hex which is also the first
register (R0) of register bank 1. Thus, if one is going to use
more than one register bank, the stack pointer should be initialized
to an area of RAM not used for data storage.
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