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ADuC7032-8L
Rev. A | Page 8 of 120
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
PACKAGE THERMAL
SPECIFICATIONS
140
150
160
°C
Thermal Impedance (
48-lead LQFP, stacked die
Top die
50
°C/W
Bottom die
25
°C/W
POWER REQUIREMENTS
Power Supply Voltages
VDD (Battery Supply)
3.5
18
V
REG_DVDD, REG_AVDD33
2.5
2.6
2.7
V
Power Consumption
MCU clock rate = 10.24 MHz, ADC off
10
20
mA
MCU clock rate = 20.48 MHz, ADC off
20
30
mA
ADC low power mode, measured over an ambient temperature range
of 10°C to +40°C (continuous ADC conversion)
300
400
μA
ADC low power mode, measured over an ambient temperature range
of 40°C to +85°C (continuous ADC conversion)
300
500
μA
ADC low power plus mode, measured over an ambient temperature
range of 10°C to +40°C (continuous ADC conversion)
520
700
μA
Average current, measured with wake-up and watchdog timer
clocked from low power oscillator (40°C to +85°C)
120
300
μA
Average current, measured with wake-up and watchdog timer clocked
from low power oscillator over an ambient temperature range of 10°C
to +40°C
120
175
μA
IDD (Current ADC)
1.7
mA
IDD (Voltage/Temperature
ADC)
Per ADC
0.5
mA
IDD (Precision Oscillator)
400
μA
1 Not guaranteed by production test, but by design and/or characterization data at production release.
2 Valid for current ADC gain setting of PGA = 4 to 64.
3 These numbers include temperature drift.
4 Tested at gain range = 4; self-offset calibration removes this error.
5 Measured with an internal short after an initial offset calibration.
6 Measured with an internal short.
7 Includes internal reference temperature drift.
8 Factory calibrated at gain = 1.
9 System calibration at specific gain range removes the error at this gain range at that temperature.
10 Valid when used in conjunction with the ADCREF (the low power mode reference error) MMR.
11 Typical noise in low power modes is measured with chop enabled.
12 Voltage channel specifications include resistive attenuator input stage.
13 Includes an initial system calibration.
14 System calibration removes this error at that temperature.
15 RMS noise is referred to voltage attenuator input. For example, at fADC = 1 kHz, typical rms noise at the ADC input is 7.5 μV, which, when scaled by the attenuator (24),
yields these input referred noise figures.
16 ADC self-offset calibration removes this error.
17 Valid after an initial self-calibration.
18 Factory calibrated for the internal temperature sensor during final production test.
19 In ADC low power mode, the input range is fixed at ±9.375 mV. In ADC low power plus mode, the input range is fixed at ±2.34375 mV.
20 It is possible to extend the ADC input range by up to 10% by modifying the factory set value of the gain calibration register or using system calibration. This approach
can also be used to reduce the ADC input range (LSB size).
21 Limited by minimum/maximum absolute input voltage range.
22 Valid for a differential input less than 10 mV.
23 Measured using box method.
24 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
25 References of up to REG_AVDD can be accommodated by enabling an internal divide-by-2.
26 Die temperature.
27 Endurance is qualified to 10,000 cycles, as per JEDEC Std. 22 Method A117, and measured at 40°C, +25°C, and +125°C. Typical endurance at 25°C is 170,000 cycles.
28 Retention lifetime equivalent at junction temperature (TJ) = 85°C, as per JEDEC Std. 22 Method A117. Retention lifetime derates with junction temperature.
29 Low power oscillator can be calibrated against either the precision oscillator or the external 32.768 kHz crystal in user code.
30 These numbers are not production tested but are supported by LIN compliance testing.
31 The MCU core is not shut down, but an interrupt is generated, if enabled.
32 Thermal impedance can be used to calculate the thermal gradient from ambient to die temperature.
33 Internal regulated supply available at REG_DVDD (ISOURCE = 5 mA) and REG_AVDD (ISOURCE = 1 mA).
34 Typical additional supply current consumed during Flash/EE memory program and erase cycles is 7 mA and 5 mA, respectively.