參數(shù)資料
型號： ADUC7032BSTZ-88
廠商： Analog Devices Inc
文件頁數(shù)： 62/120頁
文件大?。?/td> 0K
描述： IC MCU 96K FLASH DUAL 48LQFP
標準包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設(shè)備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 托盤
ADuC7032-8L
Rev. A | Page 46 of 120
Current Channel ADC Control Register
Name:
ADC0CON
Address:
0xFFFF050C
Default Value:
0x00002
Access:
Read/write
Function:
The current channel ADC control MMR is a 16-bit register that is used to configure the I-ADC. Note that if the current ADC
is reconfigured via ADC0CON, the voltage and temperature ADCs are also reset.
Table 37. ADC0CON MMR Bit Designations
Bit
Description
15
Current Channel ADC Enable.
Set to 1 by user code to enable the I-ADC.
Cleared to 0 to power down the I-ADC and reset the respective ADC ready bit in the ADCSTA MMR to 0.
14 to 13
Current Source Enable.
00 = current sources off.
01 = enable 50 μA current source on IIN+.
10 = enable 50 μA current source on IIN.
11 = enable 50 μA current source on both IIN and IIN+.
12 to 10
Not Used. Reserved for future functionality and should be written as 0.
9
Current Channel ADC Output Coding.
Set to 1 by user code to configure I-ADC output coding as unipolar.
Cleared to 0 by user code to configure I-ADC output coding as twos complement.
8
Not Used. Reserved for future functionality and should be written as 0.
7 to 6
Current Channel ADC Input Select.
00 = IIN+, IIN.
01 = IIN, IIN. Diagnostic, internal short configuration.
10 = ADC reference/136, 0 V. Diagnostic, test voltage for gain settings ≤ 128.
11 = not defined.
5 to 4
Current Channel ADC Reference Select.
00 = internal, 1.2 V precision reference selected. In ADC low power mode, the voltage reference selection is controlled by
ADCMDE[5].
01 = external reference inputs (VREF, GND_SW) selected.
10 = external reference inputs divided by 2 ((VREF, GND_SW)/2) selected allows an external reference up to REG_AVDD.
11 = (REG_AVDD, AGND)/2 selected.
3 to 0
Current Channel ADC Gain Select. (Note that nominal I-ADC full-scale input voltage = VREF/GAIN.)
0000 = I-ADC gain = 1.
0001 = I-ADC gain = 2.
0010 = I-ADC gain = 4.
0011 = I-ADC gain = 8.
0100 = I-ADC gain = 16.
0101 = I-ADC gain = 32.
0110 = I-ADC gain = 64.
0111 = I-ADC gain = 128.
1000 = I-ADC gain = 256.
1001 = I-ADC gain = 512.
1xxx = I-ADC gain is undefined.
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