參數(shù)資料
型號： ADSP-21992YBC
廠商： Analog Devices Inc
文件頁數(shù)： 18/60頁
文件大?。?/td> 0K
描述： IC DSP CTLR 16BIT 196CSPBGA
標準包裝： 1
系列： ADSP-21xx
類型： 定點
接口： SPI，SSP
時鐘速率： 150MHz
非易失內(nèi)存： 外部
芯片上RAM： 128kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 2.50V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 196-BGA
供應商設備封裝： 196-MBGA（15x15）
包裝： 托盤
ADSP-21992
Rev. A
|
Page 25 of 60
|
August 2007
Table 12. Electrical Characteristics—ADSP-21992YST
Parameter
Conditions
Test Conditions
Min
Typ
Max
Unit
VIH
High Level Input Voltage1
@ VDDEXT = Maximum
2.0
VDDEXT
V
VIH
High Level Input Voltage2
@ VDDEXT = Maximum
2.2
VDDEXT
V
VIL
High Level Input Voltage1, 2
@ VDDEXT = minimum
0.8
V
VOH
High Level Output Voltage3
@ VDDEXT = Minimum,
IOH = –0.5 mA
2.4
V
VOL
Low Level Output Voltage3
@ VDDEXT = Minimum,
IOL = 2.0 mA
0.4
V
IIH
High Level Input Current4
@ VDDINT = Maximum,
VIN = 3.6 V
10
μA
IIH
High Level Input Current5
@ VDDINT = Maximum,
VIN = 3.6 V
150
μA
IIH
High Level Input Current6
@ VDDINT = Maximum,
VIN = 3.6 V
10
μA
IIL
Low Level Input Current
@ VDDINT = Maximum,
VIN = 0 V
10
μA
IIL
Low Level Input Current
@ VDDINT = Maximum,
VIN = 0 V
10
μA
IIL
Low Level Input Current
@ VDDINT = Maximum,
VIN = 0 V
150
μA
IOZH
Three-State Leakage Current7
@ VDDINT = Maximum,
VIN = 3.6 V
10
μA
IOZL
Three-State Leakage Current7
@ VDDINT = Maximum,
VIN = 0 V
10
μA
CI
Input Pin Capacitance
fIN = 1 MHz
10
pF
CO
Output Pin Capacitance
fIN = 1 MHz
10
pF
IDD-PEAK
Supply Current (Internal)8, 9
190
250
mA
IDD-TYP
Supply Current (Internal)8
155
210
mA
IDD-IDLE
Supply Current (Idle)8
145
180
mA
IDD-STOPCLK
Supply Current (Power-Down)8, 10
60
100
mA
IDD-STOPALL
Supply Current (Power-Down)8, 11
12
40
mA
IDD-PDOWN
Supply Current (Power-Down)8, 12
635
mA
IAVDD
Analog Supply Current13
46
65
mA
IAVDD-ADCOFF
Analog Supply Current12
515
mA
1 Applies to all input and bidirectional pins.
2 Applies to input pins CLKIN, RESET, TRST.
3 Applies to all output and bidirectional pins.
4 Applies to all input only pins.
5 Applies to input pins with internal pull-down.
6 Applies to input pins with internal pull-up.
7 Applies to three-stateable pins.
8 The IDD supply currents are affected by the operating frequency of the device. The guaranteed numbers are based on an assumed CCLK = 100 MHz, HCLK = 50 MHz
for the ADSP-21992YST. IDD refers only to the current consumption on the internal power supply lines (VDDINT). The current consumption at the I/O on the VDDEXT
power supply is very much dependent on the particular connection of the device in the final system.
9 IDD-PEAK represents worst-case processor operation and is not sustainable under normal application conditions. Actual internal power measurements made using typical
applications are less than specified. Measured at VDDINT = maximum.
10IDLE denotes the current consumption during execution of the IDLE instruction. Measured at VDDINT = maximum.
11IDD-PDOWN represents the processor operation in full power-down mode with both core and peripheral clocks disabled. Measured at VDDINT = maximum.
12IAVDD represents the power consumption of the analog system. Measured at AVDD = maximum.
13The responsibility lies with the user to ensure that the device is operated in such a manner that the maximum allowable junction temperature is not exceeded.
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