- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10710 > ADS1259BIPW (Texas Instruments)IC ADC 24BIT 14KSPS LN 20TSSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | ADS1259BIPW |
| 廠商： | Texas Instruments |
| 文件頁(yè)數(shù)： | 14/48頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT 14KSPS LN 20TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Industrial Automation Overview |
| 標(biāo)準(zhǔn)包裝： | 70 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 14k |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 2 個(gè)單端，單極；2 個(gè)單端，雙極；1 個(gè)差分，單極；1 個(gè)差分，雙極 |
| 其它名稱： | 296-27183-5 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)當(dāng)前第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)
XTAL1/CLKIN
XTAL2
External
Clock
50W
C
1
Crystal
(7.3728MHz)
XTAL1/CLKIN
XTAL2
C
1
2
,C :5pFto20pF
C
2
SBAS424D
– JUNE 2009 – REVISED AUGUST 2011
External Clock
SYNCOUT
Figure 46 shows the external clock connection. The
SYNCOUT is a digital output pin intended to
clock is applied to XTAL1/CLKIN and XTAL2 floats.
synchronize the chopping frequency of the PGA280
Make sure a clean clock input is applied to the
to
the
sampling
frequency
of
the
ADS1259.
ADS1259, free of overshoot and glitches. A series
Synchronizing the PGA280 to the ADS1259 places
resistor often helps to reduce overshoot and should
the PGA280 chopped 1/f noise at an exact null in the
be placed close to the driving end of the clock
ADS1259 frequency response, where the PGA280 1/f
source.
noise is rejected.
SYNCOUT frequency is equal to the ADS1259 clock
rate divided by 8 (fSYNCOUT = fCLK/8). The output clock
is enabled by the register bit SYNCOUT. Disabling
the output stops the clock but the output remains
actively
driven
low.
In
power-down
mode,
the
SYNCOUT output becomes an input. As with all
digital inputs, the pin must not be allowed to float. An
Figure 46. External Clock Connection
external 1M
Ω pull-down resistor is recommended to
ground the input in power-down mode.
Crystal Oscillator
The SYNCOUT clock is reset when START is
received and whenever registers CONFIG[2:0] are
Figure 47 shows the crystal oscillator connection. The
changed.
Connect
SYNCOUT
to
the
PGA280
crystal connects to XTAL1/CLKIN and XTAL2 and the
SYNCIN pin through a 4.7k
Ω series resistor. Place
capacitors connect to ground. The crystal and
the resistor as close as possible to the ADS1259
capacitors should be placed close to the device pins
SYNCOUT pin.
with short, direct traces. Neither the XTAL1/CLKIN
nor the XTAL2 pins can be used to drive any other
logic. Table 5 lists the recommended crystal for the
SLEEP MODE
ADS1259. If using other crystals, verify the oscillator
SLEEP mode is started by sending the SLEEP
start-up behavior.
command. In SLEEP mode, the device enters a
reduced power state and only a minimum of circuitry
is kept active. The WAKEUP command exits the
SLEEP mode and after which 512 fCLK cycles are
counted
before
the
ADS1259
is
ready
for
communication. The register settings are unaffected
in SLEEP.
SLEEP does not change the RBIAS register bit. For
quick conversions after WAKEUP, keep the internal
Figure 47. Crystal Connection
reference bias on before entering SLEEP. Otherwise,
after exiting SLEEP mode, allow time for the
reference to settle. Alternatively, to minimize power
Table 5. Recommended Crystal
consumption during SLEEP, set the internal reference
MANUFACTURER
FREQUENCY
PART NUMBER
bias off prior to engaging SLEEP. Note that in SLEEP
ECS
7.3728MHz
ECS-73-18-10
mode the SPI timeout function is disabled.
BYPASS
The digital core of the ADS1259 is powered by an
internal low dropout regulator (LDO). The DVDD
supply is the LDO input and the BYPASS pin is the
LDO output. A 1
μF capacitor must be connected from
the LDO output to DGND. No other load current
should be drawn from the BYPASS pin.
Copyright
2009–2011, Texas Instruments Incorporated
21
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TLC2551ID | IC 12BIT 400 KSPS ADC S/O 8-SOIC |
| MCP6544T-I/SL | IC COMP PUSHPULL 1.6V QUAD14SOIC |
| MCP6549T-I/SL | IC COMP OPENDRN 1.6V QUAD 14SOIC |
| MCP6549T-I/ST | IC COMP OPENDRN 1.6V QUAD14TSSOP |
| VI-2WX-IX-B1 | CONVERTER MOD DC/DC 5.2V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS1259BIPW | 制造商:Texas Instruments 功能描述:A/D CONVERTER (A-D) IC |
| ADS1259BIPWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Noise 14kSPS 24B ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1259EVM | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADS1259 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| ADS1259EVM | 制造商:Texas Instruments 功能描述:DEVELOPMENT TOOL |
| ADS1259EVM-PDK | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADS1259 Perf Demo Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。