參數(shù)資料
型號: ADS1259BIPW
廠商: Texas Instruments
文件頁數(shù): 30/48頁
文件大?。?/td> 0K
描述: IC ADC 24BIT 14KSPS LN 20TSSOP
產(chǎn)品培訓(xùn)模塊: Industrial Automation Overview
標(biāo)準(zhǔn)包裝: 70
位數(shù): 24
采樣率(每秒): 14k
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
輸入數(shù)目和類型: 2 個單端,單極;2 個單端,雙極;1 個差分,單極;1 個差分,雙極
其它名稱: 296-27183-5
SBAS424D
– JUNE 2009 – REVISED AUGUST 2011
CONFIG1: CONFIGURATION REGISTER 1 (Address = 1h)
7
6
5
4
3
2
1
0
FLAG
CHKSUM
0
SINC2
EXTREF
DELAY2
DELAY1
DELAY0
Reset value = 00001000b.
Bit 7
FLAG: Out-of-range flag
0 = Disabled (default)
1 = Enabled: replaces bit 24 (LSB) of the conversion data with the out-of-range bit; if the
CHKSUM byte is enabled, bit 7 of the checksum byte
Bit 6
CHKSUM: Checksum
0 = Disabled (default)
1 = Conversion data checksum byte included in readback
Bit 5
Reserved
Always write '0'.
Bit 4
SINC2: Digital filter mode
0 = sinc1 filter (default)
1 = sinc2 filter
Bit 3
EXTREF: Reference select
0 = Internal
1 = External (default)
Bits 2-0
DELAY[2:0]: START conversion delay
000 = No delay (default)
001 = 64 tCLK
010 = 128 tCLK
011 = 256 tCLK
100 = 512 tCLK
101 = 1024 tCLK
110 = 2048 tCLK
111 = 4096 tCLK
36
Copyright
2009–2011, Texas Instruments Incorporated
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