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參數(shù)資料
| 型號： | ADE7758ARWZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Poly Phase Multifunction Energy Metering IC with Per Phase Information |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | LEAD FREE, MS-013-AD, SOIC-24 |
| 文件頁數(shù)： | 63/68頁 |
| 文件大?。?/td> | 1584K |
| 代理商： | ADE7758ARWZRL |
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ADE7758
COMPUTATIONAL MODE REGISTER (0x16)
The computational method of the ADE7758 is defined by writing to the COMPMODE register. Table 17 summarizes the functionality of
each bit in the COMPMODE register.
Table 17. COMPMODE Register
Bit
Location
Mnemonic
Value
Description
0 to 1
CONSEL
0
These bits are used to select the input to the energy accumulation registers.
Registers
CONSEL[1, 0] = 00
AWATTHR
VA × IA
BWATTHR
VB × IB
CWATTHR
VC × IC
AVARHR
VA × IA
BVARHR
VB × IB
CVARHR
VC × IC
AVAHR
VA
RMS
× IA
RMS
BVAHR
VB
RMS
× IB
RMS
CVAHR
VC
RMS
× IC
RMS
CONSEL[1, 1] is reserved.
Note: IA, IB, and IC are IA, IB, and IC phase shifted by –90°, respectively.
2 to 4
TERMSEL
7
These bits are used to select the phases to be included in the APCF and VARCF pulse outputs.
Setting Bit 2 enables Phase A (the inputs to AWATTHR and AVARHR registers) to be included. Bit 3
and Bit 4 are for Phase B and Phase C, respectively. Setting all three bits enables the sum of all three
phases to be included in the frequency outputs (see the Active Power Frequency Output and the
Reactive Power Frequency Output sections).
5
ABS
0
Setting this bit places the APCF output pin in absolute only mode. Namely, the APCF output
frequency is proportional to the sum of the absolute values of the watt-hour accumulation registers
(AWATTHR, BWATTHR, and CWATTHR). Note that this bit only affects the APCF pin and has no effect
on the content of the corresponding registers.
6
SAVAR
0
Setting this bit places the VARCF output pin in the signed adjusted mode. Namely, the VARCF
output frequency are proportional to the sign-adjusted sum of the VAR-hour accumulation registers
(AVARHR, BVARHR, and CVARHR). The sign of the VAR is determined from the sign of the watt
calculation from the corresponding phase, i.e., the sign of the VAR is flipped if the sign of the watt is
negative, and if the watt is positive, there is no change to the sign of the VAR. Note that this bit only
affects the VARCF pin and has no effect on the content of the corresponding registers.
7
NOLOAD
0
Setting this bit activates the no-load threshold in the ADE7758.
Rev. A | Page 63 of 68
Bit
Default
CONSEL[1, 0] = 01
VA × (IA – IB)
0
VC × (IC – IB)
VA × (IA – IB)
0
VC × (IC – IB)
VA
RMS
× IA
RMS
(VA
RMS
+ VC
RMS
)/2 × IB
RMS
VC
RMS
× IC
RMS
CONSEL[1, 0] = 10
VA × (IA–IB)
0
VC × IC
VA × (IA–IB)
0
VC × IC
VA
RMS
× A
RMS
VA
RMS
× IB
RMS
VC
RMS
× IC
RMS
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