- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373980 > ADE7758ARWZRL (ANALOG DEVICES INC) Poly Phase Multifunction Energy Metering IC with Per Phase Information PDF資料下載
參數(shù)資料
| 型號(hào)： | ADE7758ARWZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | Poly Phase Multifunction Energy Metering IC with Per Phase Information |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | LEAD FREE, MS-013-AD, SOIC-24 |
| 文件頁數(shù)： | 39/68頁 |
| 文件大?。?/td> | 1584K |
| 代理商： | ADE7758ARWZRL |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁當(dāng)前第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
ADE7758
For a pure sinusoidal system, the two approaches should yield
the same result. The apparent energy calculation in the ADE7758
uses the arithmetical approach. However, the line cycle energy
accumulation mode in the ADE7758 enables energy accumula-
tion between active and reactive energies over a synchronous
period of time, thus the vectorial method can be easily
implemented in the external MCU (see the Line Cycle Active
Energy Accumulation Mode section).
Rev. A | Page 39 of 68
Note that apparent power is always positive regardless of the
direction of the active or reactive energy flows. The rms value of
the current and voltage in each phase is multiplied to produce
the apparent power of the corresponding phase. The output
from the multiplier is then low-pass filtered to obtain the
average apparent power. The frequency response of the LPF in
the apparent power signal path is identical to that of the LPF2
used in the average active power calculation (see Figure 65).
Apparent Power Gain Calibration
Note that the average active power result from the LPF output
in each phase can be scaled by ±50% by writing to the phase’s
VAGAIN register (AVAG, BVAG, or CVAG). The VAGAIN
registers are twos complement, signed registers and have a
resolution of 0.024%/LSB. The function of the VAGAIN
registers is expressed below mathematically.
=
Power
Apparent
Average
+
×
12
2
Register
VAGAIN
Output
LPF
1
2
The output is scaled by –50% when the VAR gain registers
contents are set to 0x800 and the output is increased by +50%
by writing 0x7FF to the watt gain register. This register can be
used to calibrate the apparent power (or energy) calculation in
the ADE7758 for each phase.
Apparent Power Offset Calibration
Each rms measurement includes an offset compensation
register to calibrate and eliminate the dc component in the rms
value (see the Current RMS Calculation and Voltage Channel
RMS Calculation sections). The voltage and current rms values
are then multiplied together in the apparent power signal
processing. As no additional offsets are created in the
multiplication of the rms values, there is no specific offset
compensation in the apparent power signal processing. The
offset compensation of the apparent power measurement in
each phase should be done by calibrating each individual rms
measurement (see the Calibration section).
Apparent Energy Calculation
Apparent energy is defined as the integral of apparent power.
Apparent Energy = ∫ S
(
t
)
dt
(24)
Similar to active and reactive energy, the ADE7758 achieves the
integration of the apparent power signal by continuously
accumulating the apparent power signal in the internal 40-bit,
unsigned accumulation registers. The VA-hr registers (AVAHR,
BVAHR, and CVAHR) represent the upper 16 bits of these
internal registers. This discrete time accumulation or summation
is equivalent to integration in continuous time. Equation 25
below expresses the relationship
( )
(
)
×
=
=
∑
=
n
∫
∞
0
T
nT
S
Lim
dt
S
Energy
Apparent
0
(25)
where
n
is the discrete time sample number and
T
is the sample
period.
Figure 75 shows the signal path of the apparent energy accumu-
lation. The apparent power signal is continuously added to the
internal apparent energy register. The average apparent power is
divided by the content of the VA divider register before they are
added to the corresponding VA-hr accumulation registers. When
the value in the VADIV[7:0] register is 0 or 1, apparent power is
accumulated without any division. VADIV is an 8-bit unsigned
register that is useful to lengthen the time it takes before the
VA-hr accumulation registers overflow.
Similar to active or reactive power accumulation, the fastest
integration time occurs when the VAGAIN registers are set to
maximum full scale, i.e., 0x7FF. When overflow occurs, the
VA-hr accumulation registers contents can roll over to 0 and
continue increasing in value. By setting the VAEHF bit (Bit 2) of
the mask register, the ADE7758 can be configured to issue an
interrupt (IRQ) when the MSB of any one of the three VA-hr
accumulation registers has changed, indicating that the
accumulation register is half full.
Setting the RSTREAD bit (Bit 6) of the LCYMODE register
enables a read-with-reset for the VA-hr accumulation registers,
i.e., the registers are reset to 0 after a read operation.
Integration Time Under Steady Load
The discrete time sample period (
T
) for the accumulation
register is 0.4 μs (4/CLKIN). With full-scale, 60 Hz sinusoidal
signals on the analog inputs and the VAGAIN registers set to
0x000, the average word value from each LPF2 is 0xB9954. The
maximum value that can be stored in the apparent energy
register before it overflows is 2
16
1 or 0xFFFF. As the average
word value is first added to the internal register, which can store
2
41
1 or 0x1FF, FFFF, FFFF before it overflows, the integration
time under these conditions with VADIV = 0 is calculated as
second
1.157
μs
0.4
0xB9954
FFFF
FFFF,
0x1FF,
=
×
=
Time
When VADIV is set to a value different from 0, the time before
overflow is scaled accordingly as shown in Equation 26.
(
)
0
VADIV
Time
Time
×
=
=
VADIV
(26)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADE7759ARSRL | Active Energy Metering IC with di/dt Sensor Interface |
| ADE7759ARS | 8-Channel 14-Bit Single-Supply Voltage-Output DAC; Package: LQFP (10x10mm); No of Pins: 52; Temperature Range: Industrial |
| ADE7759 | Active Energy Metering IC with di/dt Sensor Interface |
| ADE7760ARSRL | Energy Metering IC with On-Chip Fault Detection |
| ADE7760 | 8-Channel 14-Bit Single-Supply Voltage-Output DAC; Package: LQFP (10x10mm); No of Pins: 52; Temperature Range: Industrial |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADE7759 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Active Energy Metering IC with di/dt Sensor Interface |
| ADE7759ARS | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:* |
| ADE7759ARSRL | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:* |
| ADE7759ARSZ | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:* |
| ADE7759ARSZRL | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:* |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。