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| 型號： | ADAU1401AWBSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AUDIO PROC 28/56BIT 48LQFP |
| 標準包裝： | 1 |
| 系列： | SigmaDSP® |
| 類型： | 音頻處理器 |
| 應用： | 監(jiān)控器，電視 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應商設備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
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ADAU1401A
Rev. A | Page 27 of 52
SELF-BOOT
On power-up, the ADAU1401A can load a program and a set
of parameters that have been saved in an external EEPROM.
Combined with the auxiliary ADC and the multipurpose pins,
this eliminates the need for a microcontroller in the system. The
self-boot is accomplished by the ADAU1401A acting as a master
on the I2C bus on startup, which occurs when the SELFBOOT pin
is set high. The ADAU1401A cannot self-boot in SPI mode.
The maximum necessary EEPROM size for program and
parameters is 9248 bytes, or just over 8.5 kB. This does not
include register settings or overhead bytes, but such factors do
not add a significant number of bytes. This much memory is
needed only if the program RAM (1024 × five bytes), parameter
RAM (1024 × four bytes), and interface registers (8 × four bytes)
are completely full. Most applications do not use the full program
and parameter RAMs, thus an 8 kB EEPROM should be sufficient.
A self-boot operation is triggered on the rising edge of RESET
when the SELFBOOT and WP pins are set high. The ADAU1401A
reads the program, parameters, and register settings from the
EEPROM. After the ADAU1401A finishes self-booting, additional
messages can be sent to the ADAU1401A on the I2C bus, although
this typically is not necessary in a self-booting application. The
I2C device address is 0x68 for a write and 0x69 for a read in this
mode. The ADDRx pins have different functions when the chip
is in this mode, so the settings on them can be ignored.
The ADAU1401A does not self-boot if WP is set low. Holding
this pin low allows the EEPROM to be programmed in-circuit.
The WP pin is pulled low (it typically has a resistor pull-up) to
enable writes to the EEPROM, but this, in turn, disables the
self-boot function until the WP pin is returned high.
The ADAU1401A is a master on the I2C bus during self-boot and
writeback. Although it is uncommon for an application using
self-boot to also have a microcontroller connected to the control
lines, care should be taken that no other device tries to write
to the I2C bus during self-boot or writeback. The ADAU1401A
generates SCL at 8 × fS; therefore, for a fS of 48 kHz, SCL is 384 kHz.
SCL has a duty cycle of 3/8 in accordance with the I2C specification.
The ADAU1401A reads from EEPROM Chip Address 0xA1. The
LSBs of the addresses of some EEPROMs are pin configurable;
in most cases, these pins should be tied low to set this address.
EEPROM Format
The EEPROM data contains a sequence of messages. Each
discrete message is one of the seven types defined in Table 20
and consists of a sequence of one or more bytes. The first byte
identifies the message type. Bytes are written MSB first. Most
messages are block write (0x01) types, which are used for writing
to the ADAU1401A program RAM, parameter RAM, and control
registers.
The body of the message following the message type should
start with a 0x00 byte; this is the chip address. As with all other
control port transactions, following the chip address is a 2-byte
register/memory address field.
Figure 28 shows an example of what should be stored in the
EEPROM, starting with EEPROM Address 0x00. In this example,
the interface registers are first set to control port write mode
(see Line 1 of Figure 28), which is followed by 18 no-operation
(no-op) bytes (see Line 2 to Line 4 of Figure 28) so that the
interface register data appears on Page 2 of the EEPROM. Next
follows the write header, which comprises a write, length and
device address (see Line 4 of Figure 28), and then 32 bytes of
interface register data (see Line 5 to Line 8 of Figure 28). Finally,
the program RAM data, starting at ADAU1401A Address 0x04
0x00 is written (see Line 9 to Line 11 of Figure 28). In this example,
the program length is 70 words, or 350 bytes, so 332 more bytes
are included in the EEPROM but are not shown in Figure 28.
Writeback
A writeback occurs when the WB pin is triggered and data is
written to the EEPROM from the ADAU1401A. This function
is typically used to save the volume setting and other parameter
settings to the EEPROM just before power is removed from the
system. A rising edge on the WB pin triggers a writeback when
the device is in self-boot mode, unless a message to set the WB pin
to be falling-edge sensitive (0x05) is contained in the self-boot
message sequence. Only one writeback takes place unless a
message to set multiple writebacks (0x04) is contained in the
self-boot message sequence. The WP pin is pulled low when a
writeback is triggered to allow writing to the EEPROM.
The ADAU1401A can only write back the contents of the interface
registers to the EEPROM. These registers are usually set by the
DSP program, but can also be written to directly after setting Bit 6
of the DSP core control register. The parameter settings that should
be saved are configured in SigmaStudio.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADAU1401AWBSTZ-RL | 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| ADAU1401YSTZ | 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| ADAU1401YSTZ-RL | 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| ADAU1421YSTZ | 制造商:Analog Devices 功能描述: |
| ADAU1421YSTZ-REEL | 制造商:Analog Devices 功能描述: |
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