I2C Read and Write Operations Figure 22 shows t" />
參數(shù)資料
型號(hào)： ADAU1401AWBSTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 18/52頁(yè)
文件大?。?/td> 0K
描述： IC AUDIO PROC 28/56BIT 48LQFP
標(biāo)準(zhǔn)包裝： 1
系列： SigmaDSP®
類(lèi)型： 音頻處理器
應(yīng)用： 監(jiān)控器，電視
安裝類(lèi)型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤(pán)
ADAU1401A
Rev. A | Page 25 of 52
I2C Read and Write Operations
Figure 22 shows the timing of a single-word write operation. On
every ninth clock, the ADAU1401A issues an acknowledge by
pulling SDA low.
Figure 23 shows the timing of a burst mode write sequence.
This figure shows an example where the target destination
registers are two bytes. The ADAU1401A knows to increment
its subaddress register every two bytes because the requested
subaddress corresponds to a register or memory area with a
word length of two bytes.
The timing of a single-word read operation is shown in
Figure 24. Note that the first R/W bit is 0, indicating a write
operation. This is because the subaddress still needs to be
written to set up the internal address. After the ADAU1401A
acknowledges the receipt of the subaddress, the master must
issue a repeated start command followed by the chip address
byte with the R/W bit set to 1 (read). This causes the ADAU1401A
SDA to reverse and begin driving data back to the master. The
master then responds every ninth pulse with an acknowledge
pulse to the ADAU1401A.
Figure 25 shows the timing of a burst mode read sequence. This
figure shows an example where the target read registers are two
bytes. The ADAU1401A increments its subaddress register every
two bytes because the requested subaddress corresponds to a
register or memory area with word lengths of two bytes. Other
addresses may have word lengths ranging from one to five bytes.
The ADAU1401A always decodes the subaddress and sets the
auto-increment circuit so that the address increments after the
appropriate number of bytes.
085
06
-022
S
AS
SUBADDRESS,
LOW BYTE
AS
...
AS
P
CHIP ADDRESS,
R/W = 0
DATA
BYTE 1
DATA
BYTE 2
DATA
BYTE N
SUBADDRESS,
HIGH BYTE
S = START BIT, P = STOP BIT, AS = ACKNOWLEDGE BY SLAVE.
SHOWS A ONE-WORD WRITE, WHERE EACH WORD HAS N BYTES.
Figure 22. Single-Word I2C Write Format
08
506
-02
3
S
AS
ASAS
ASASAS
AS
...
P
CHIP
ADDRESS,
R/W = 0
SUBADDRESS,
HIGH BYTE
SUBADDRESS,
LOW BYTE
DATA-WORD 1,
BYTE 1
DATA-WORD 1,
BYTE 2
DATA-WORD 2,
BYTE 1
DATA-WORD 2,
BYTE 2
DATA-WORD N,
BYTE 1
DATA-WORD N,
BYTE 2
S = START BIT, P = STOP BIT, AS = ACKNOWLEDGE BY SLAVE.
SHOWS AN N-WORD WRITE, WHERE EACH WORD HAS TWO BYTES. (OTHER WORD LENGTHS ARE POSSIBLE, RANGING FROM ONE TO FIVE BYTES.)
Figure 23. Burst Mode I2C Write Format
08
50
6-
02
4
S
AM
AS
AM
AS
S
AS
...
P
CHIP ADDRESS,
R/W = 0
CHIP ADDRESS,
R/W = 1
DATA
BYTE N
DATA
BYTE 2
DATA
BYTE 1
SUBADDRESS,
HIGH BYTE
SUBADDRESS,
LOW BYTE
S = START BIT, P = STOP BIT, AM = ACKNOWLEDGE BY MASTER, AS = ACKNOWLEDGE BY SLAVE.
SHOWS A ONE-WORD READ, WHERE EACH WORD HAS N BYTES.
Figure 24. Single-Word I2C Read Format
08
50
6-
0
25
S
SAS
AS
AM
...
P
CHIP
ADDRESS,
R/W = 0
SUBADDRESS,
HIGH BYTE
SUBADDRESS,
LOW BYTE
DATA-WORD 1,
BYTE 1
DATA-WORD 1,
BYTE 2
DATA-WORD N,
BYTE 1
DATA-WORD N,
BYTE 2
CHIP
ADDRESS,
R/W = 1
S = START BIT, P = STOP BIT, AM = ACKNOWLEDGE BY MASTER, AS = ACKNOWLEDGE BY SLAVE.
SHOWS AN N-WORD READ, WHERE EACH WORD HAS TWO BYTES. (OTHER WORD LENGTHS ARE POSSIBLE, RANGING FROM ONE TO FIVE BYTES.)
Figure 25. Burst Mode I2C Read Format
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ADAU1401AWBSTZ-RL 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類(lèi)型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱(chēng):497-11050-6
ADAU1401YSTZ 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類(lèi)型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱(chēng):497-11050-6
ADAU1401YSTZ-RL 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類(lèi)型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱(chēng):497-11050-6
ADAU1421YSTZ 制造商:Analog Devices 功能描述:
ADAU1421YSTZ-REEL 制造商:Analog Devices 功能描述:
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