參數(shù)資料
型號: AD7655ASTZRL
廠商: Analog Devices Inc
文件頁數(shù): 6/28頁
文件大小: 0K
描述: IC ADC 16BIT 4CHAN 48LQFP
標準包裝: 2,000
系列: PulSAR®
位數(shù): 16
采樣率(每秒): 1M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 135mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個差分,單極
配用: EVAL-AD7655CBZ-ND - BOARD EVALUATION FOR AD7655
AD7655
Rev. B | Page 14 of 28
APPLICATION INFORMATION
CIRCUIT INFORMATION
The AD7655 is a very fast, low power, single-supply, precise
simultaneous sampling 16-bit ADC.
The AD7655 provides the user with two on-chip, track-and-
hold, successive approximation ADCs that do not exhibit any
pipeline or latency, making it ideal for multiple multiplexed
channel applications. The AD7655 can also be used as a
4-channel ADC with two pairs simultaneously sampled.
The AD7655 can be operated from a single 5 V supply and be
interfaced to either 5 V or 3 V digital logic. It is housed in a
48-lead LQFP or a tiny, 48-lead LFCSP that combines space
savings and allows flexible configurations as either a serial or
parallel interface. The AD7655 is pin-to-pin compatible with
PulSAR ADCs.
MODES OF OPERATION
The AD7655 features two modes of operation, normal mode
and impulse mode. Each of these modes is suitable for specific
applications.
Normal mode is the fastest mode (1 MSPS). Except when it is
powered down (PD = HIGH), the power dissipation is almost
independent of the sampling rate.
Impulse mode, the lowest power dissipation mode, allows
power saving between conversions. The maximum throughput
in this mode is 888 kSPS. When operating at 20 kSPS, for
example, it typically consumes only 2.6 mW. This feature makes
the AD7655 ideal for battery-powered applications.
TRANSFER FUNCTIONS
The AD7655 data format is straight binary. The ideal transfer
characteristic for the AD7655 is shown in Figure 16 and Table 7.
The LSB size is 2 × VREF/65536, which is about 76.3 μV.
000...000
000...001
000...010
111...101
111...110
111...111
ANALOG INPUT
+FS – 1.5 LSB
+FS – 1 LSB
–FS + 1 LSB
–FS
–FS + 0.5 LSB
ADC
CODE
(S
tra
ight
Bina
ry
)
03536-016
Figure 16. ADC Ideal Transfer Function
Table 7. Output Codes and Ideal Input Voltages
Description
Analog Input
VREF = 2.5 V
Digital Output Code
FSR 1 LSB
4.999924 V
0xFFFF1
FSR 2 LSB
4.999847 V
0xFFFE
Midscale + 1 LSB
2.500076 V
0x8001
Midscale
2.5 V
0x8000
Midscale 1 LSB
2.499924 V
0x7FFF
FSR + 1 LSB
76.29 μV
0x0001
FSR
0 V
0x00002
1 This is also the code for overrange analog input:
(V
– V
above 2 × (V
– V
)).
INx
INxN
REF
REFGND
2 This is also the code for underrange analog input (VINx below VINxN).
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