參數(shù)資料
型號(hào): AD7655ASTZRL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 18/28頁(yè)
文件大?。?/td> 0K
描述: IC ADC 16BIT 4CHAN 48LQFP
標(biāo)準(zhǔn)包裝: 2,000
系列: PulSAR®
位數(shù): 16
采樣率(每秒): 1M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 135mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)差分,單極
配用: EVAL-AD7655CBZ-ND - BOARD EVALUATION FOR AD7655
AD7655
Rev. B | Page 25 of 28
APPLICATION HINTS
LAYOUT
The AD7655 has very good immunity to noise on the power
supplies. However, care should still be taken with regard to
grounding layout.
The printed circuit board that houses the AD7655 should be
designed so the analog and digital sections are separated and
confined to certain areas of the board. This facilitates the use of
ground planes that can be separated easily. Digital and analog
ground planes should be joined in only one place, preferably
underneath the AD7655, or as close as possible to the AD7655.
If the AD7655 is in a system where multiple devices require
analog-to-digital ground connections, the connection should
still be made at one point only, a star ground point that should
be established as close as possible to the AD7655.
Avoid unning digital lines under the device because these
couple noise onto the die. The analog ground plane should be
allowed to run under the AD7655 to avoid noise coupling. Fast
switching signals such as CNVST or clocks should be shielded
with digital ground to avoid radiating noise to other sections of
the board and should never run near analog signal paths.
Crossover of digital and analog signals should be avoided.
Traces on different but close layers of the board should run at
right angles to each other. This reduces the effect of crosstalk
through the board.
The power supply lines to the AD7655 should use as large a
trace as possible to provide low impedance paths and reduce the
effect of glitches on the power supply lines. Good decoupling is
also important to lower the supply impedance presented to the
AD7655 and to reduce the magnitude of the supply spikes.
Decoupling ceramic capacitors, typically 100 nF, should be
placed on each power supply pin—AVDD, DVDD, and
OVDD—close to, and ideally right up against these pins and
their corresponding ground pins. Additionally, low ESR 10 μF
capacitors should be located near the ADC to further reduce
low frequency ripple.
The DVDD supply of the AD7655 can be a separate supply or
can come from the analog supply AVDD or the digital interface
supply OVDD. When the system digital supply is noisy or when
fast switching digital signals are present, if no separate supply is
available, the user should connect DVDD to AVDD through an
RC filter (see Figure 17) and the system supply to OVDD and
the remaining digital circuitry. When DVDD is powered from
the system supply, it is useful to insert a bead to further reduce
high frequency spikes.
The AD7655 has five ground pins: INGND, REFGND, AGND,
DGND, and OGND. INGND is used to sense the analog input
signal. REFGND senses the reference voltage and, because it
carries pulsed currents, should be a low impedance return to
the reference. AGND is the ground to which most internal
ADC analog signals are referenced; it must be connected with
the least resistance to the analog ground plane. DGND must be
tied to the analog or digital ground plane depending on the
configuration. OGND is connected to the digital system
ground.
EVALUATING THE AD7655 PERFORMANCE
A recommended layout for the AD7655 is outlined in the
EVAL-AD7655CB evaluation board documentation. The
evaluation board package includes a fully assembled and tested
evaluation board, documentation, and software for controlling
the board from a PC via the EVAL-CONTROL-BRD3.
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