
LPC Interface Bridge Registers (D31:F0)
9-52
Intel
82801BA ICH2 Datasheet
9.7.2
NMI_EN—NMI Enable (and Real Time Clock Index)
I/O Address:
Default Value:
Lockable:
70h
80h
No
Attribute:
Size:
Power Well:
R/W (Special)
8-bit
Core
Note:
The RTC Index field is write-only for normal operation. This field can only be read in Alt-Access
Mode. Note, however, that this register is aliased to Port 74h (documented in Table 19-2), and all
bits are readable at that address.
9.7.3
PORT92—Fast A20 and Init Register
I/O Address:
Default Value:
Lockable:
92h
00h
No
Attribute:
Size:
Power Well:
R/W
8-bit
Core
9.7.4
COPROC_ERR—Coprocessor Error Register
I/O Address:
Default Value:
Lockable:
F0h
00h
No
Attribute:
Size:
Power Well:
WO
8-bits
Core
Bits
Description
7
NMI Enable (NMI_EN)
—R/W.
0 = Enable NMI sources.
1 = Disable All NMI sources.
6:0
Real Time Clock Index Address (RTC_INDX)
—R/W. This data goes to the RTC to select which
register or CMOS RAM address is being accessed.
Bit
Description
7:2
Reserved.
1
Alternate A20 Gate (ALT_A20_GATE)
—R/W. This bit is ORed with the A20GATE input signal to
generate A20M# to the processor.
0 = A20M# signal can potentially go active.
1 = This bit is set when INIT# goes active.
0
Interrupt Now (INIT_NOW
)—R/W. When this bit transitions from a 0 to a 1, the ICH2 will force
INIT# active for 16 PCI clocks.
Bits
Description
7:0
Coprocessor Error (COPROC_ERR)
—WO. Any value written to this register will cause IGNNE# to
go active, if FERR# had generated an internal IRQ13. For FERR# to generate an internal IRQ13,
the COPROC_ERR_EN bit (Device 31:Function 0, Offset D0, Bit 13) must be 1.
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