52
CHAPTER 1 GENERAL
Table 1-20. Functional Outline of
μ
PD78075B8 Subseries
Item
Part Number
Mask ROM
32K bytes
40K bytes
1024 bytes
32 bytes
64K bytes
8 bits
×
8
×
4 banks
0.4
μ
s/0.8
μ
s/1.6
μ
s/3.2
μ
s/6.4
μ
s/12.8
μ
s (at 5.0 MHz)
122
μ
s (at 32.768 kHz)
16-bit operation
Multiplication/division (8 bits
×
8 bits, 16 bits
÷
8 bits)
Bit manipulation (set, reset, test, Boolean operation)
BCD adjustment, etc.
Total
CMOS input
CMOS I/O
N-ch open-drain I/O : 8
: 88
: 2
: 78
8-bit resolution
×
8 channels
8-bit resolution
×
2 channels
3-wire serial I/O/SBI/2-wire serial I/O mode selectable
3-wire serial I/O mode (with function to automatically transfer/receive up to 32 bytes)
: 1 channel
3-wire serial I/O/UART mode selectable
: 1 channel
: 1 channel
16-bit timer/event counter : 1 channel
8-bit timer/event counter : 4 channels
Watch timer
Watchdog timer
: 1 channel
: 1 channel
5 (14-bit PWM output: 1, 8-bit PWM output: 2)
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, 5.0 MHz (with
main system clock of 5.0 MHz), 32.768 kHz (with subsystem clock of 32.768 kHz)
Internal: 15, external: 7
Internal: 1
1
Internal: 1, external: 1
V
DD
= 1.8 to 5.5 V
100-pin plastic QFP (fine pitch) (14
×
14 mm, resin thickness 1.45 mm)
100-pin plastic QFP (14
×
20 mm, resin thickness 2.7 mm)
ROM
High-speed RAM
Buffer RAM
Expansion RAM
Memory space
General-purpose register
Minimum
With main
instruction
system clock
execution With subsystem
time
clock
Instruction set
I/O port
A/D converter
D/A converter
Serial interface
Timer
Timer output
Clock output
Vectored
Maskable
interrupt
Non-maskable
source
Software
Test input
Supply voltage
Package
Internal
memory
μ
PD78074B
μ
PD78075B