APPENDIX B REVISION HISTORY
The revision history of this document is as follows. “Chapter” indicates the chapter number in the preceding edition.
(1/2)
Edition
Major Revision from Preceding Edition
Chapter
Throughout
2nd edition
CHAPTER 4 APPLICATION OF
WATCHDOG TIMER
CHAPTER 5 APPLICATION OF
16-BIT TIMER/EVENT COUNTER
CHAPTER 8 APPLICATION OF
SERIAL INTERFACE
Addition of following products as target products:
μ
PD780018, 780018Y, 780058, 780058Y, 780308, 780308Y,
78058F, 78058FY, 78064B, 78075B, 78075BY, 78098B
subseries,
μ
PD78070A, 78070AY
μ
PD78052(A), 78053(A), 78054(A)
μ
PD78062(A), 78063(A), 78064(A)
μ
PD78081(A), 78082(A), 78P083(A), 78081(A2)
μ
PD78058F(A), 78058FY(A)
μ
PD78064B(A)
Deletion of following products as target products:
μ
PD78P054Y, 78P064Y, 78074, 78075, 78074Y, 78075Y
Addition of Note 2 and Caution 2 to Figure 4-5 Format of
Watchdog Timer Mode Register
Addition of Caution to Figure 5-8 Format of External Interrupt
Mode Register 0
Addition of Table 8-2 Items Supported by Each Subseries
Addition of Table 8-3 Registers of Serial Interface
Addition of note on using wake-up function and note on
changing operation mode to Figures 8-7 and 8-8 Format of
Serial Operating Mode Register 0
Addition of Caution to Figures 8-16 and 8-17 Format of
Automatic Data Transmission/Reception Interval Specification
Register
Addition of Figures 8-23 and 8-24 Format of Serial Interface Pin
Select Register
μ
PD6252 as maintenance product in 8.1 Interface with
EEPROM
TM
(
μ
PD6252)
Addition of (5) Limitations when using I
2
C bus mode to 8.1.2
Communication in I
2
C bus mode
Addition of (f) Limitations when using UART mode to 8.5
Interface in Asynchronous Serial Interface (UART) Mode
387