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CHAPTER 5 APPLICATIONS OF 16-BIT TIMER/EVENT COUNTER
(4) Program list
PUBLIC SOP_INIT
OPINIT
SOP_INIT:
TMC0=#00000000B
TCL0=#01000000B
CRC0=#00000000B
CR00=#11550–1
CR01=#10500–1
TOC0=#00110111B
TMC0=#00001100B
RET
END
CSEG
5.5 PPG Output
When using the 16-bit timer/event counter in the PPG (Programmable Pulse Generator) mode, the 16-bit timer
mode control register (TMC0), capture/compare control register 0 (CRC0), and 16-bit timer output control register
(TOC0) must be set.
As the PPG output pulse, a square wave with a cycle specified by the count value set in advance to the 16-bit
capture/compare register 00 (CR00) and a pulse width specified by the count value set in advance to the 16-bit capture/
compare register 01 (CR01) is output from the TO0/P30 pin.
In the application example shown in this section, the output waveform is changed by using the PPG output. Data
indicating the one cycle and pulse width of the output waveform is stored in ROM. This data is stored in the compare
register.
The cycle and pulse width of the PPG output in this program can be changed in units of 1 ms to 10 ms. Therefore,
the cycle can be set in a range of 2 to 10 ms, and the pulse width can be set in a range of 1 to 9 ms. If the cycle
is equal to or less than the pulse width when the output waveform is changed, the data is not changed.
The output waveform is changed after the end of one output cycle. Figure 5-17 shows the PPG output waveform
changing timing.
Figure 5-17. PPG Output Waveform Changing Timing
; Stops timer operation
; Count clock of 16-bit timer register: 1.05 MHz
; Uses CR00 and CR01 as compare registers
; Sets compare register to 11 ms
; Sets compare register to 10 ms
; Selects one-shot pulse mode
; Starts on coincidence between TM0 and CR00 (enables timer operation)
;
Request for
change
Data changed Request for change
Data changed
Pulse
width
1 cycle