21
CHAPTER 1 GENERAL
ROM
High-speed RAM
Buffer RAM
Expansion RAM
Memory space
General-purpose register
Minimum
With main
instruction
system clock
execution With subsystem
time
clock
Instruction set
I/O port
IEBus controller
A/D converter
D/A converter
Serial interface
Timer
Timer output
Clock output
Table 1-8. Functional Outline of
μ
PD78098 Subseries (1/2)
Item
Part Number
Mask ROM
PROM
32K bytes
40K bytes
48K bytes
60K bytes
60K bytes
Note 3
1024 bytes
32 bytes
None
2048 bytes
2048 bytes
Note 4
64K bytes
8 bits
×
8
×
4 banks
0.5
μ
s/1.0
μ
s/2.0
μ
s/4.0
μ
s/8.0
μ
s/16.0 (at 6.0 MHz)
122
μ
s (at 32.768 kHz)
16-bit operation
Multiplication/division (8 bits
×
8 bits, 16 bits
÷
8 bits)
Bit manipulation (set, reset, test, Boolean operation)
BCD adjustment, etc.
Total
CMOS input
CMOS I/O
N-ch open-drain I/O: 4
: 69
: 2
: 63
Effective transfer rate: 3.9 kbps/17 kbps/26 kbps
8-bit resolution
×
8 channels
8-bit resolution
×
2 channels
3-wire serial I/O/SBI/2-wire serial I/O mode selectable
3-wire serial I/O mode (with function to automatically transfer/receive up to 32 bytes)
: 1 channel
3-wire serial I/O/UART mode selectable
: 1 channel
: 1 channel
16-bit timer/event counter : 1 channel
8-bit timer/event counter : 2 channels
Watch timer
Watchdog timer
: 1 channel
: 1 channel
3 (14-bit PWM output: 1)
15.6 kHz, 31.3 kHz, 62.5 kHz, 125 kHz, 250 kHz, 500 kHz, 1.0 MHz, 2.0 MHz, 4.0 MHz (with
main system clock of 6.0 MHz), 32.768 kHz (with subsystem clock of 32.768 kHz)
Notes 1.
Under development
2.
The
μ
PD78P098A is the PROM model of the
μ
PD78094, 78095, 78096, and 78098A.
3.
The internal PROM capacity can be changed by using a memory size select register (IMS).
4.
The internal expansion RAM can be changed by using an internal expansion RAM size select register
(IXS).
Internal
memory
μ
PD78094
μ
PD78095
μ
PD78096
μ
PD78098A
Note 1
μ
PD78P098A
Note 1, 2