XRT94L43
99
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
REV. 1.0.2
V21
STS3RxD_Alarm_2
RxDS3FP_2
TxSTS1FP_2
O
CMOS
STS-3/STM-1 Receive (Drop) Telecom Bus - Alarm Indicator Output
signal - Channel 2; DS3/E3 Frame Synchronizer Framing Pulse Out-
put Pin - Channel 2:
See description for Pin # C20 above using the appropriate channel num-
bers.
If STS-3/STM-1 Telecom Bus (Channel 2) has been enabled - STS-3/
STM-1 Receive Telecom Bus - Alarm Indicator Output signal:
If STS-3/STM-1 Telecom Bus (Channel 2) is disabled then the func-
tion of this output pin depends upon whether Channel 1 has been
configured to operate in either the DS3/E3 or STS-1 Modes
AD21
STS3RxD_Alarm_3
RxDS3FP_3
TxSTS1FP_3
O
CMOS
STS-3/STM-1 Receive (Drop) Telecom Bus - Alarm Indicator Output
signal - Channel 3; DS3/E3 Frame Synchronizer Framing Pulse Out-
put Pin - Channel 1:
See description for Pin # C20 above using the appropriate channel num-
bers.
If STS-3/STM-1 Telecom Bus (Channel 3) has been enabled - STS-3/
STM-1 Receive Telecom Bus - Alarm Indicator Output signal:
If STS-3/STM-1 Telecom Bus (Channel 3) is disabled then the func-
tion of this output pin depends upon whether Channel 1 has been
configured to operate in either the DS3/E3 or STS-1 Modes
B21
STS3RxD_D_0_0
TxLEV_0
RxSBData_0
O
CMOS
Receive STS-3/STM-1 Telecom Bus - Channel 0 - Output Data Bus
Pin Number 0/TxLEV_0 (General Purpose) Output pin:
The function of this output pin depends upon whether or not theSTS-3/
STM-1 Telecom Bus Interface, associated with Channel 0 is enabled.
If STS-3/STM-1 Telecom Bus (Channel 0) has been enabled - STS-3/
STM-1 Receive Telecom Bus - Output Data bus Pin Number 0:
STSRxD_D_0_0:
This output pin along with STS3RxD_D_0[7:1] function as the STS-3/
STM-1 Receive (Drop) Telecom Bus - Output Data Bus for Channel 0.
The STS-3/STM-1 Telecom Bus Interface will update the data via this
output upon the rising edge of STS3RxD_CLK_0.
NOTE: This input pin functions as the LSB (Least Significant Bit) of the
Receive (Drop) Telecom Bus for Channel 0.
If STS-3/STM-1 Telecom Bus (Channel 0) is disabled - TXLEV_0
(General Purpose) output Pin.
This output pin can be used as a general purpose output pin.
The state of this output pin can be controlled by writing the appropriate
value into Bit 2 (TxLEV) within the Line Interface Drive Register associ-
ated with Channel 0 (Indirect Address = 0x1E, 0x80), (Direct Address =
0x1F80).
NOTE: For Product Legacy purposes, this pin is called TxLEV_0 because
one possible application is to tie this output pin to a TxLEV
(Transmit Line Build-Out Disable) input pin from one of Exar's
XRT73L0X/XRT75L0X DS3/E3/STS-1 LIU devices. However,
this output pin, and the corresponding register bit can be used for
any purpose.
STS-3/STM-1 TELECOM BUS INTERFACE - RECEIVE DIRECTION
PIN #SIGNAL NAME
I/O
SIGNAL
TYPE
DESCRIPTION