TABLE
參數(shù)資料
型號： XRT86VL38IB484-F
廠商： Exar Corporation
文件頁數(shù)： 45/160頁
文件大?。?/td> 0K
描述： IC LIU/FRAMER T1/E1/J1 8CH 484BG
標準包裝： 60
控制器類型： T1/E1/J1 調(diào)幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 484-BGA
供應(yīng)商設(shè)備封裝： 484-STBGA（23x23）
包裝： 托盤
XRT86VL38
134
REV. V1.2.0
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 112: LIU CHANNEL CONTROL REGISTER 3 (LIUCCR3)
HEX ADDRESS: 0X0FN3
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-6
NLCDE[1:0]
R/W
00
Network Loop Code Detection Enable [1:0]:
These bits are used to control the Loop-Code detection on the
receive path of each channel, according to the table below. This
part must be in Single Rail mode to detect.
Loop-Up Code Detection Enable:
The XRT86VL38 is configured to monitor the receive data for the
Loop-Up code Pattern (i.e. a string of four ‘0’s followed by one ‘1’
pattern). When the presence of the “00001” pattern is detected for
more than 5 seconds, the status of the NLCD bit (bit 3 of register
0x0Fn5) is set to “1” and if the NLCD interrupt is enabled (bit 3 of
register 0x0Fn4), an interrupt will be generated.
Loop-Down Code Detection Enable:
The XRT86VL38 is configured to monitor the receive data for the
Loop-Down code Pattern (i.e. a string of two ‘0’s followed by one ‘1’
pattern). When the presence of the “001” pattern is detected for
more than 5 seconds, the status of the NLCD bit (bit 3 of register
0x0Fn5) is set to “1” and if the NLCD interrupt is enabled (bit 3 of
register 0x0Fn4), an interrupt will be generated.
Automatic Loop-Up Code Detection and Remote Loop Back
Activation Enable:
When this mode is enabled, the state of the NLCD bit (bit 3 of regis-
ter 0x0Fn5) is reset to “0” and the XRT86VL38 is configured to mon-
itor the receive data for the Loop-Up code. If the “00001” pattern is
detected for longer than 5 seconds, then the NLCD bit (bit 3 of regis-
ter 0x0Fn5) is set “1”, and Remote Loop-Back is activated. Once the
remote loop-back is activated, the XRT86VL38 is automatically pro-
grammed to monitor the receive data for the Loop-Down code. The
NLCD bit stays set even after the chip stops receiving the Loop-Up
code.
The Remote Loop-Back condition is removed only when the
XRT86VL38 receives the Loop-Down code for more than 5 seconds
or if the Automatic Loop-Code detection mode is terminated.
5-2
Reserved
R/W
0
This Bit Is Not Used
NLCDE[1:0]
NETWORK LOOP CODE DETECTION
ENABLE
00
Disables Loop Code Detection
01
Enables Loop-Up Code Detection on
the Receive Path.
10
Enables Loop-Down Code Detection
on the Receive Path.
11
Enables Automatic Loop-Up Code
Detection on the Receive Path and
Remote Loop-Back Activation upon
detecting Loop-Up Code.
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XRT86VL38IB-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 8-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT86VL38IB-F 制造商:Exar Corporation 功能描述:T1/E1 Framer Combo IC
XRT86VL3X 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
XRT86VL3X_07 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
XRT86VL3X_0710 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
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