參數資料
型號： XRT86VL38IB484-F
廠商： Exar Corporation
文件頁數： 130/160頁
文件大?。?/td> 0K
描述： IC LIU/FRAMER T1/E1/J1 8CH 484BG
標準包裝： 60
控制器類型： T1/E1/J1 調幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 484-BGA
供應商設備封裝： 484-STBGA（23x23）
包裝： 托盤
XRT86VL38
66
REV. V1.2.0
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
2
Tx_IDLE
R/W
0
Transmit Idle (Flag Sequence Byte)
This bit configures the Transmit HDLC Controller Block #3 to unconditionally
transmit a repeating string of Flag Sequence octets (0X7E) in the data link
channel to the Remote terminal. In normal conditions, the Transmit HDLC
Controller block will repeatedly transmit the Flag Sequence octet whenever
there is no MOS message to transmit to the remote terminal equipment.
However, if the user invokes this “Transmit Idle Sequence” feature, then the
Transmit HDLC Controller block will UNCONDITIONALLY transmit a repeat-
ing stream of the Flag Sequence octet (thereby overwriting all outbound
MOS data-link messages).
0 - Configures the Transmit HDLC Controller Block # 3 to transmit data-link
information in a “normal” manner.
1 - Configures the Transmit HDLC Controller block # 3 to transmit a repeat-
ing string of Flag Sequence Octets (0x7E).
NOTE: This bit is ignored if the Transmit HDLC3 controller is operating in the
BOS Mode - bit 0 (MOS/BOS) within this register is set to 0.
1
Tx_FCS_EN
R/W
0
Transmit LAPD Message with Frame Check Sequence (FCS)
This bit permits the user to configure the Transmit HDLC Controller block # 3
to compute and append FCS octets to the “back-end” of each outbound
MOS data-link message.
0 - Configures the Transmit HDLC Controller block # 3 to NOT compute and
append the FCS octets to the back-end of each outbound MOS data-link
message.
1 - Configures the Transmit HDLC Controller block # 3 TO COMPUTE and
append the FCS octets to the back-end of each outbound MOS data-link
message.
NOTE:
This bit is ignored if the transmit HDLC3 controller has been
configured to operate in the BOS mode - bit 0 (MOS/BOS) within this
register is set to 0.
0
MOS/BOS
R/W
0
Message Oriented Signaling/Bit Oriented Signaling Send
This bit permits the user to enable LAPD transmission through HDLC Con-
troller Block # 3 using either BOS (Bit-Oriented Signaling) or MOS (Mes-
sage-Oriented Signaling) frames.
0 - Transmit HDLC Controller block # 3 BOS message Send.
1 - Transmit HDLC Controller block # 3 MOS message Send.
NOTE: This is not an Enable bit. This bit must be set to "0" each time a BOS
is to be sent.
TABLE 47: DATA LINK CONTROL REGISTER (DLCR3)
HEX ADDRESS: 0Xn153
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
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XRT86VL38IB-F 功能描述:網絡控制器與處理器 IC 8-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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