TABLE
參數資料
型號： XRT86VL38IB484-F
廠商： Exar Corporation
文件頁數： 129/160頁
文件大小： 0K
描述： IC LIU/FRAMER T1/E1/J1 8CH 484BG
標準包裝： 60
控制器類型： T1/E1/J1 調幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 484-BGA
供應商設備封裝： 484-STBGA（23x23）
包裝： 托盤
XRT86VL38
65
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. V1.2.0
TABLE 47: DATA LINK CONTROL REGISTER (DLCR3)
HEX ADDRESS: 0Xn153
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
SLC-96 Data
Link Enable
R/W
0
SLC96 DataLink Enable
This bit permits the user to configure the channel to support the transmission
and reception of the “SLC-96 type” of data-link message.
0 - Channel does not support the transmission and reception of “SLC-96”
type of data-link messages. Regular SF framing bits will be transmitted.
1 - Channel supports the transmission and reception of the “SLC-96” type of
data-link messages.
NOTE: This bit is only active if the channel has been configured to operate in
either the SLC-96 or the ESF Framing formats.
6
MOS ABORT
Disable
R/W
0
MOS ABORT Disable:
This bit permits the user to either enable or disable the “Automatic MOS
ABORT” feature within Transmit HDLC Controller # 3. If the user enables this
feature, then Transmit HDLC Controller block # 3 will automatically transmit
the ABORT Sequence (e.g., a zero followed by a string of 7 consecutive
“1s”) whenever it abruptly transitions from transmitting a MOS type of mes-
sage, to transmitting a BOS type of message.
If the user disables this feature, then the Transmit HDLC Controller Block # 3
will NOT transmit the ABORT sequence, whenever it abruptly transitions
from transmitting a MOS-type of message to transmitting a BOS-type of
message.
0 - Enables the “Automatic MOS Abort” feature
1 - Disables the “Automatic MOS Abort” feature
5
Rx_FCS_DIS
R/W
0
Receive Frame Check Sequence (FCS) Verification Enable/Disable
This bit permits the user to configure the Receive HDLC Controller Block # 3
to compute and verify the FCS value within each incoming LAPD message
frame.
0 - Enables FCS Verification
1 - Disables FCS Verification
4
AutoRx
R/W
0
Auto Receive LAPD Message
This bit configures the Receive HDLC Controller Block #3 to discard any
incoming BOS or LAPD Message frame that exactly match which is currently
stored in the Receive HDLC3 buffer.
0 = Disables this “AUTO DISCARD” feature
1 = Enables this “AUTO DISCARD” feature.
3
Tx_ABORT
R/W
0
Transmit ABORT
This bit configures the Transmit HDLC Controller Block #3 to transmit an
ABORT sequence (string of 7 or more consecutive 1’s) to the Remote termi-
nal.
0 - Configures the Transmit HDLC Controller Block # 3 to function normally
(e.g., not transmit the ABORT sequence).
1 - Configures the Transmit HDLC Controller block # 3 to transmit the
ABORT Sequence.
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XRT86VL38IB-F 功能描述:網絡控制器與處理器 IC 8-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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