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參數(shù)資料
| 型號： | XRD98L59AIGTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 7/37頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCD DIGITIZER 10BIT 28TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 10 |
| 通道數(shù)： | 1 |
| 電壓 - 電源，模擬： | 2.7 V ~ 3.6 V |
| 電壓 - 電源，數(shù)字： | 2.7 V ~ 3.6 V |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 帶卷 (TR) |
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15
Rev. 2.00
XRD98L59
During the video phase of each pixel the
φ2 switches are
closed when SPIX is active. The difference between the
pixel black reference level and video level is transmitted
through capacitors C1 & C2. Differential amplifier PGA1
+
PGA1
-
Vbias1 ~0.8
External
Coupling
Capacitors
VBIAS2
CLAMP
In_Pos
In_Neg
Gain
Register
to ADC
C
D
GND
Vout
C1
C2
C3
+
PGA2
-
+
BUF
-
C4
φ1
φ2
RSTREJ
+
PGA1
-
Vbias1~0.8
External
Coupling
Capacitors
VBIAS2
CLAMP
Gain
Register
to ADC
C
D
GND
Vout
C1
C2
C3
+
PGA2
-
+
BUF
-
C4
φ1
φ2
RSTREJ
Figure 9. CDS - Video Phase:
φφφφφ1 Switches Open, φφφφφ2 and RSTREJ Switches Closed
During the black reference phase of each pixel the
RSTREJ switches are closed, allowing the difference
between the black reference level voltage and VBIAS2
to develop across capacitors C1 and C2 (see Figure 8).
φ1 is closed when SBLK is active.
Figure 8. CDS - Black Reference Phase: RSTREJ and
φφφφφ1 Switch Closed
amplifies both CDS inputs from CCD
IN and REFIN. The
inactive phase of SPIX turns off the
φ2 switches, storing
the differential pixel value on capacitors C3 & C4 (see
Figure 9).
During the reset phase of each pixel the RSTREJ
switches are turned off, see Figure 7, opening the
XRD98L59 CDS input. This is done to limit reset pulse
transients seen by the front end of the XRD98L59.
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