參數(shù)資料
型號: XC3S200AN-4FT256I
廠商: Xilinx Inc
文件頁數(shù): 23/123頁
文件大小: 0K
描述: IC FPGA SPARTAN 3AN 256FTBGA
標準包裝: 90
系列: Spartan®-3AN
LAB/CLB數(shù): 448
邏輯元件/單元數(shù): 4032
RAM 位總計: 294912
輸入/輸出數(shù): 195
門數(shù): 200000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-FTBGA
Spartan-3AN FPGA Family: Pinout Descriptions
DS557 (v4.1) April 1, 2011
Product Specification
119
User I/Os by Bank
Table 83 indicates how the 502 available user-I/O pins are distributed between the four I/O banks on the FGG676 package.
The AWAKE pin is counted as a dual-purpose I/O.
Footprint Migration Differences
The XC3S1400AN is the only Spartan-3AN FPGA offered in the FGG676 package. The XC3S1400AN FPGA is pin
compatible with the Spartan-3A XC3S1400A FPGA in the FG(G)676 package, although the Spartan-3A FPGA requires an
external configuration source.
Table 83: User I/Os Per Bank for the XC3S1400AN in the FGG676 Package
Package
Edge
I/O Bank
Maximum I/Os
All Possible I/O Pins by Type
I/O
INPUT
DUAL
VREF
CLK
Top
0
120
82
20
1
9
8
Right
1
130
67
15
30
10
8
Bottom
2
120
67
14
21
10
8
Left
3
132
97
18
0
9
8
Total
502
313
67
52
38
32
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