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參數(shù)資料
| 型號(hào)： | V58C2512404SAT5I |
| 廠商： | PROMOS TECHNOLOGIES INC |
| 元件分類： | DRAM |
| 英文描述： | 128M X 4 DDR DRAM, 0.65 ns, PDSO66 |
| 封裝： | 0.400 X 0.875 INCH, PLASTIC, MS-024FC, TSOP2-66 |
| 文件頁數(shù)： | 19/60頁 |
| 文件大?。?/td> | 914K |
| 代理商： | V58C2512404SAT5I |
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V58C2512(804/404/164)SA*I Rev. 1.6 May 2007
ProMOS TECHNOLOGIES
V58C2512(804/404/164)SA*I
Self Refresh
A self refresh command is defined by having CS, RAS, CAS and CKE held low with WE high at the rising
edge of the clock (CK). Once the self refresh command is initiated, CKE must be held low to keep the device
in self refresh mode. During the self refresh operation, all inputs except CKE are ignored. The clock is inter-
nally disabled during self refresh operation to reduce power consumption. The self refresh is exited by sup-
plying stable clock input before returning CKE high, asserting deselect or NOP command and then asserting
CKE high for longer than tSREX for locking of DLL. The auto refresh is required before self refresh entry and
after self refresh exit.
Power Down Mode
The power down mode is entered when CKE is low and exited when CKE is high. Once the power down
mode is initiated, all of the receiver circuits except clock, CKE and DLL circuit are gated off to reduce power
consumption. All banks should be in idle state prior to entering the precharge power down mode and CKE
should be set high at least 1tck+tIS prior to row active command. During power down mode, refresh opera-
tions cannot be performed, therefore the device cannot remain in power down mode longer than the refresh
period (tREF) of the device.
Command
CKE
Stable Clock
tSREX
Auto
Refresh
NOP
Self
Refresh
CK, CK
CKE
Precharge
Active
Read
NOP
Active
power down
Exit
Active
Entry
power
Exit
down
power
Entry
down
Precharge
precharge
Command
CK, CK
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