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參數(shù)資料
| 型號： | UPD44164362BF5-E40-EQ3-A |
| 元件分類： | SRAM |
| 英文描述： | 512K X 36 DDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 13 X 15 MM, LEAD FREE, PLASTIC, BGA-165 |
| 文件頁數(shù)： | 1/33頁 |
| 文件大?。?/td> | 494K |
| 代理商： | UPD44164362BF5-E40-EQ3-A |
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R10DS0014EJ0100 Rev.1.00
Page 1 of 32
Dec 13, 2010
Datasheet
μPD44164182B-A
μPD44164362B-A
18M-BIT DDR II SRAM
2-WORD BURST OPERATION
Description
The
μPD44164182B-A is a 1,048,576-word by 18-bit and the μPD44164362B-A is a 524,288-word by 36-
bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS
six-transistor memory cell.
The
μPD44164182B-A and μPD44164362B-A integrate unique synchronous peripheral circuitry and a burst
counter. All input registers controlled by an input clock pair (K and K#) are latched on the positive edge of K
and K#.
These products are suitable for application which require synchronous operation, high speed, low voltage,
high density and wide bit configuration.
These products are packaged in 165-pin PLASTIC BGA.
Features
1.8 ± 0.1 V power supply
165-pin PLASTIC BGA (13 x 15)
HSTL interface
PLL circuitry for wide output data valid window and future frequency scaling
Pipelined double data rate operation
Common data input/output bus
Two-tick burst for low DDR transaction size
Two input clocks (K and K#) for precise DDR timing at clock rising edges only
Two output clocks (C and C#) for precise flight time
and clock skew matching-clock and data delivered together to receiving device
Internally self-timed write control
Clock-stop capability. Normal operation is restored in 20
μs after clock is resumed.
User programmable impedance output (35 to 70 Ω)
Fast clock cycle time : 3.3 ns (300 MHz), 3.5 ns (287 MHz), 4.0 ns (250 MHz), 5.0 ns (200 MHz)
Simple control logic for easy depth expansion
JTAG boundary scan
R10DS0014EJ0100
Rev.1.00
Dec 13, 2010
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD44164362F5-E60-EQ1ES | 制造商:NEC Electronics Corporation 功能描述: |
| UPD44165092BF5-E40-EQ3-A | 制造商:Renesas Electronics Corporation 功能描述:2MX9, 2BURST, 250 MHZ QDRII SRAM - Trays |
| UPD44165094BF5-E40-EQ3-A | 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 18M-Bit 2M x 9-Bit 0.45ns 165-Pin BGA |
| UPD44165362BF5-E40-EQ3 | 制造商:Renesas Electronics Corporation 功能描述:UPD44165362BF5-E40-EQ3 - Trays |
| UPD44165362BF5-E40-EQ3-A | 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 18M-Bit 512K x 36 0.45ns 165-Pin BGA |
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